Patchwork powerpc/mpc85xx: fix non-bootcpu cannot up after hibernation resume

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Submitter Dongsheng Wang
Date May 14, 2013, 8:05 a.m.
Message ID <1368518756-9850-1-git-send-email-dongsheng.wang@freescale.com>
Download mbox | patch
Permalink /patch/243629/
State Accepted, archived
Delegated to: Scott Wood
Headers show

Comments

Dongsheng Wang - May 14, 2013, 8:05 a.m.
This problem belongs to the core synchronization issues.
The cpu1 already updated spin_table values, but bootcore cannot get
this value in time.

After bootcpu hibiernation restore the pages. we are now running
with the kernel data of the old kernel fully restored. if we reset
the non-bootcpus that will be reset cache(tlb), the non-bootcpus
will get new address(map virtual and physical address spaces).
but bootcpu tlb cache still use boot kernel data, so we need to
invalidate the bootcpu tlb cache make it to get new main memory data.

log:
Enabling non-boot CPUs ...
smp_85xx_kick_cpu: timeout waiting for core 1 to reset
smp: failed starting cpu 1 (rc -2)
Error taking CPU1 up: -2

Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com>
Wang Dongsheng-B40534 - May 14, 2013, 8:59 a.m.
I send to a wrong email address "Anton Vorontsov <avorontsov@ru.mvista.com>"

Add Anton Vorontsov <anton.vorontsov@linaro.org> to this email.

Thanks all.

> -----Original Message-----
> From: Wang Dongsheng-B40534
> Sent: Tuesday, May 14, 2013 4:06 PM
> To: avorontsov@ru.mvista.com
> Cc: paulus@samba.org; rjw@sisk.pl; benh@kernel.crashing.org;
> johannes@sipsolutions.net; Wood Scott-B07421; Li Yang-R58472; Zhao
> Chenhui-B35336; linuxppc-dev@lists.ozlabs.org; Wang Dongsheng-B40534
> Subject: [PATCH] powerpc/mpc85xx: fix non-bootcpu cannot up after
> hibernation resume
> 
> This problem belongs to the core synchronization issues.
> The cpu1 already updated spin_table values, but bootcore cannot get
> this value in time.
> 
> After bootcpu hibiernation restore the pages. we are now running
> with the kernel data of the old kernel fully restored. if we reset
> the non-bootcpus that will be reset cache(tlb), the non-bootcpus
> will get new address(map virtual and physical address spaces).
> but bootcpu tlb cache still use boot kernel data, so we need to
> invalidate the bootcpu tlb cache make it to get new main memory data.
> 
> log:
> Enabling non-boot CPUs ...
> smp_85xx_kick_cpu: timeout waiting for core 1 to reset
> smp: failed starting cpu 1 (rc -2)
> Error taking CPU1 up: -2
> 
> Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com>
> 
> diff --git a/arch/powerpc/kernel/swsusp_booke.S
> b/arch/powerpc/kernel/swsusp_booke.S
> index 11a3930..9503249 100644
> --- a/arch/powerpc/kernel/swsusp_booke.S
> +++ b/arch/powerpc/kernel/swsusp_booke.S
> @@ -141,6 +141,19 @@ _GLOBAL(swsusp_arch_resume)
>  	lis	r11,swsusp_save_area@h
>  	ori	r11,r11,swsusp_save_area@l
> 
> +	/*
> +	 * The boot core get a virtual address, when the boot process,
> +	 * the virtual address corresponds to a physical address. After
> +	 * hibernation resume memory snapshots, The corresponding
> +	 * relationship between the virtual memory and physical memory
> +	 * might change again. We need to get a new page table. So we
> +	 * need to invalidate TLB after resume pages.
> +	 *
> +	 * Invalidations TLB Using tlbilx/tlbivax/MMUCSR0.
> +	 * tlbilx used here.
> +	 */
> +	bl	_tlbil_all
> +
>  	lwz	r4,SL_SPRG0(r11)
>  	mtsprg	0,r4
>  	lwz	r4,SL_SPRG1(r11)
> --
> 1.8.0
Anton Vorontsov - May 23, 2013, 5:33 p.m.
Hi!

On Tue, May 14, 2013 at 08:59:13AM +0000, Wang Dongsheng-B40534 wrote:
> I send to a wrong email address "Anton Vorontsov <avorontsov@ru.mvista.com>"
> 
> Add Anton Vorontsov <anton.vorontsov@linaro.org> to this email.

I don't have any means to test it, but the patch itself looks good and the
description makes sense. So,

Reviewed-by: Anton Vorontsov <anton@enomsg.org>

Thanks!

> 
> Thanks all.
> 
> > -----Original Message-----
> > From: Wang Dongsheng-B40534
> > Sent: Tuesday, May 14, 2013 4:06 PM
> > To: avorontsov@ru.mvista.com
> > Cc: paulus@samba.org; rjw@sisk.pl; benh@kernel.crashing.org;
> > johannes@sipsolutions.net; Wood Scott-B07421; Li Yang-R58472; Zhao
> > Chenhui-B35336; linuxppc-dev@lists.ozlabs.org; Wang Dongsheng-B40534
> > Subject: [PATCH] powerpc/mpc85xx: fix non-bootcpu cannot up after
> > hibernation resume
> > 
> > This problem belongs to the core synchronization issues.
> > The cpu1 already updated spin_table values, but bootcore cannot get
> > this value in time.
> > 
> > After bootcpu hibiernation restore the pages. we are now running
> > with the kernel data of the old kernel fully restored. if we reset
> > the non-bootcpus that will be reset cache(tlb), the non-bootcpus
> > will get new address(map virtual and physical address spaces).
> > but bootcpu tlb cache still use boot kernel data, so we need to
> > invalidate the bootcpu tlb cache make it to get new main memory data.
> > 
> > log:
> > Enabling non-boot CPUs ...
> > smp_85xx_kick_cpu: timeout waiting for core 1 to reset
> > smp: failed starting cpu 1 (rc -2)
> > Error taking CPU1 up: -2
> > 
> > Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com>
> > 
> > diff --git a/arch/powerpc/kernel/swsusp_booke.S
> > b/arch/powerpc/kernel/swsusp_booke.S
> > index 11a3930..9503249 100644
> > --- a/arch/powerpc/kernel/swsusp_booke.S
> > +++ b/arch/powerpc/kernel/swsusp_booke.S
> > @@ -141,6 +141,19 @@ _GLOBAL(swsusp_arch_resume)
> >  	lis	r11,swsusp_save_area@h
> >  	ori	r11,r11,swsusp_save_area@l
> > 
> > +	/*
> > +	 * The boot core get a virtual address, when the boot process,
> > +	 * the virtual address corresponds to a physical address. After
> > +	 * hibernation resume memory snapshots, The corresponding
> > +	 * relationship between the virtual memory and physical memory
> > +	 * might change again. We need to get a new page table. So we
> > +	 * need to invalidate TLB after resume pages.
> > +	 *
> > +	 * Invalidations TLB Using tlbilx/tlbivax/MMUCSR0.
> > +	 * tlbilx used here.
> > +	 */
> > +	bl	_tlbil_all
> > +
> >  	lwz	r4,SL_SPRG0(r11)
> >  	mtsprg	0,r4
> >  	lwz	r4,SL_SPRG1(r11)
> > --
> > 1.8.0
> 
>
Wang Dongsheng-B40534 - May 24, 2013, 5:21 a.m.
Thanks anton.

> -----Original Message-----
> From: Anton Vorontsov [mailto:anton@scarybugs.org] On Behalf Of Anton
> Vorontsov
> Sent: Friday, May 24, 2013 1:34 AM
> To: Wang Dongsheng-B40534
> Cc: paulus@samba.org; rjw@sisk.pl; benh@kernel.crashing.org;
> johannes@sipsolutions.net; Wood Scott-B07421; Li Yang-R58472; Zhao
> Chenhui-B35336; linuxppc-dev@lists.ozlabs.org
> Subject: Re: [PATCH] powerpc/mpc85xx: fix non-bootcpu cannot up after
> hibernation resume
> 
> Hi!
> 
> On Tue, May 14, 2013 at 08:59:13AM +0000, Wang Dongsheng-B40534 wrote:
> > I send to a wrong email address "Anton Vorontsov
> <avorontsov@ru.mvista.com>"
> >
> > Add Anton Vorontsov <anton.vorontsov@linaro.org> to this email.
> 
> I don't have any means to test it, but the patch itself looks good and
> the description makes sense. So,
> 
> Reviewed-by: Anton Vorontsov <anton@enomsg.org>
> 
> Thanks!
> 
> >
> > Thanks all.
> >
> > > -----Original Message-----
> > > From: Wang Dongsheng-B40534
> > > Sent: Tuesday, May 14, 2013 4:06 PM
> > > To: avorontsov@ru.mvista.com
> > > Cc: paulus@samba.org; rjw@sisk.pl; benh@kernel.crashing.org;
> > > johannes@sipsolutions.net; Wood Scott-B07421; Li Yang-R58472; Zhao
> > > Chenhui-B35336; linuxppc-dev@lists.ozlabs.org; Wang Dongsheng-B40534
> > > Subject: [PATCH] powerpc/mpc85xx: fix non-bootcpu cannot up after
> > > hibernation resume
> > >
> > > This problem belongs to the core synchronization issues.
> > > The cpu1 already updated spin_table values, but bootcore cannot get
> > > this value in time.
> > >
> > > After bootcpu hibiernation restore the pages. we are now running
> > > with the kernel data of the old kernel fully restored. if we reset
> > > the non-bootcpus that will be reset cache(tlb), the non-bootcpus
> > > will get new address(map virtual and physical address spaces).
> > > but bootcpu tlb cache still use boot kernel data, so we need to
> > > invalidate the bootcpu tlb cache make it to get new main memory data.
> > >
> > > log:
> > > Enabling non-boot CPUs ...
> > > smp_85xx_kick_cpu: timeout waiting for core 1 to reset
> > > smp: failed starting cpu 1 (rc -2)
> > > Error taking CPU1 up: -2
> > >
> > > Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com>
> > >
> > > diff --git a/arch/powerpc/kernel/swsusp_booke.S
> > > b/arch/powerpc/kernel/swsusp_booke.S
> > > index 11a3930..9503249 100644
> > > --- a/arch/powerpc/kernel/swsusp_booke.S
> > > +++ b/arch/powerpc/kernel/swsusp_booke.S
> > > @@ -141,6 +141,19 @@ _GLOBAL(swsusp_arch_resume)
> > >  	lis	r11,swsusp_save_area@h
> > >  	ori	r11,r11,swsusp_save_area@l
> > >
> > > +	/*
> > > +	 * The boot core get a virtual address, when the boot process,
> > > +	 * the virtual address corresponds to a physical address. After
> > > +	 * hibernation resume memory snapshots, The corresponding
> > > +	 * relationship between the virtual memory and physical memory
> > > +	 * might change again. We need to get a new page table. So we
> > > +	 * need to invalidate TLB after resume pages.
> > > +	 *
> > > +	 * Invalidations TLB Using tlbilx/tlbivax/MMUCSR0.
> > > +	 * tlbilx used here.
> > > +	 */
> > > +	bl	_tlbil_all
> > > +
> > >  	lwz	r4,SL_SPRG0(r11)
> > >  	mtsprg	0,r4
> > >  	lwz	r4,SL_SPRG1(r11)
> > > --
> > > 1.8.0
> >
> >
Wang Dongsheng-B40534 - June 9, 2013, 8:23 a.m.
Hi kumar,

Could you apply this patche? 

Thanks.

-dongsheng

> -----Original Message-----
> From: Anton Vorontsov [mailto:anton@scarybugs.org] On Behalf Of Anton
> Vorontsov
> Sent: Friday, May 24, 2013 1:34 AM
> To: Wang Dongsheng-B40534
> Cc: paulus@samba.org; rjw@sisk.pl; benh@kernel.crashing.org;
> johannes@sipsolutions.net; Wood Scott-B07421; Li Yang-R58472; Zhao
> Chenhui-B35336; linuxppc-dev@lists.ozlabs.org
> Subject: Re: [PATCH] powerpc/mpc85xx: fix non-bootcpu cannot up after
> hibernation resume
> 
> Hi!
> 
> On Tue, May 14, 2013 at 08:59:13AM +0000, Wang Dongsheng-B40534 wrote:
> > I send to a wrong email address "Anton Vorontsov
> <avorontsov@ru.mvista.com>"
> >
> > Add Anton Vorontsov <anton.vorontsov@linaro.org> to this email.
> 
> I don't have any means to test it, but the patch itself looks good and
> the description makes sense. So,
> 
> Reviewed-by: Anton Vorontsov <anton@enomsg.org>
> 
> Thanks!
> 
> >
> > Thanks all.
> >
> > > -----Original Message-----
> > > From: Wang Dongsheng-B40534
> > > Sent: Tuesday, May 14, 2013 4:06 PM
> > > To: avorontsov@ru.mvista.com
> > > Cc: paulus@samba.org; rjw@sisk.pl; benh@kernel.crashing.org;
> > > johannes@sipsolutions.net; Wood Scott-B07421; Li Yang-R58472; Zhao
> > > Chenhui-B35336; linuxppc-dev@lists.ozlabs.org; Wang Dongsheng-B40534
> > > Subject: [PATCH] powerpc/mpc85xx: fix non-bootcpu cannot up after
> > > hibernation resume
> > >
> > > This problem belongs to the core synchronization issues.
> > > The cpu1 already updated spin_table values, but bootcore cannot get
> > > this value in time.
> > >
> > > After bootcpu hibiernation restore the pages. we are now running
> > > with the kernel data of the old kernel fully restored. if we reset
> > > the non-bootcpus that will be reset cache(tlb), the non-bootcpus
> > > will get new address(map virtual and physical address spaces).
> > > but bootcpu tlb cache still use boot kernel data, so we need to
> > > invalidate the bootcpu tlb cache make it to get new main memory data.
> > >
> > > log:
> > > Enabling non-boot CPUs ...
> > > smp_85xx_kick_cpu: timeout waiting for core 1 to reset
> > > smp: failed starting cpu 1 (rc -2)
> > > Error taking CPU1 up: -2
> > >
> > > Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com>
> > >
> > > diff --git a/arch/powerpc/kernel/swsusp_booke.S
> > > b/arch/powerpc/kernel/swsusp_booke.S
> > > index 11a3930..9503249 100644
> > > --- a/arch/powerpc/kernel/swsusp_booke.S
> > > +++ b/arch/powerpc/kernel/swsusp_booke.S
> > > @@ -141,6 +141,19 @@ _GLOBAL(swsusp_arch_resume)
> > >  	lis	r11,swsusp_save_area@h
> > >  	ori	r11,r11,swsusp_save_area@l
> > >
> > > +	/*
> > > +	 * The boot core get a virtual address, when the boot process,
> > > +	 * the virtual address corresponds to a physical address. After
> > > +	 * hibernation resume memory snapshots, The corresponding
> > > +	 * relationship between the virtual memory and physical memory
> > > +	 * might change again. We need to get a new page table. So we
> > > +	 * need to invalidate TLB after resume pages.
> > > +	 *
> > > +	 * Invalidations TLB Using tlbilx/tlbivax/MMUCSR0.
> > > +	 * tlbilx used here.
> > > +	 */
> > > +	bl	_tlbil_all
> > > +
> > >  	lwz	r4,SL_SPRG0(r11)
> > >  	mtsprg	0,r4
> > >  	lwz	r4,SL_SPRG1(r11)
> > > --
> > > 1.8.0
> >
> >
Scott Wood - Aug. 8, 2013, 12:34 a.m.
On Tue, May 14, 2013 at 04:05:56PM +0800, Dongsheng Wang wrote:
> This problem belongs to the core synchronization issues.
> The cpu1 already updated spin_table values, but bootcore cannot get
> this value in time.
> 
> After bootcpu hibiernation restore the pages. we are now running
> with the kernel data of the old kernel fully restored. if we reset
> the non-bootcpus that will be reset cache(tlb), the non-bootcpus
> will get new address(map virtual and physical address spaces).
> but bootcpu tlb cache still use boot kernel data, so we need to
> invalidate the bootcpu tlb cache make it to get new main memory data.
> 
> log:
> Enabling non-boot CPUs ...
> smp_85xx_kick_cpu: timeout waiting for core 1 to reset
> smp: failed starting cpu 1 (rc -2)
> Error taking CPU1 up: -2
> 
> Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com>
> Reviewed-by: Anton Vorontsov <anton@enomsg.org>
> 
> 
> diff --git a/arch/powerpc/kernel/swsusp_booke.S b/arch/powerpc/kernel/swsusp_booke.S
> index 11a3930..9503249 100644
> --- a/arch/powerpc/kernel/swsusp_booke.S
> +++ b/arch/powerpc/kernel/swsusp_booke.S
> @@ -141,6 +141,19 @@ _GLOBAL(swsusp_arch_resume)
>  	lis	r11,swsusp_save_area@h
>  	ori	r11,r11,swsusp_save_area@l
>  
> +	/*
> +	 * The boot core get a virtual address, when the boot process,
> +	 * the virtual address corresponds to a physical address. After
> +	 * hibernation resume memory snapshots, The corresponding
> +	 * relationship between the virtual memory and physical memory
> +	 * might change again. We need to get a new page table. So we
> +	 * need to invalidate TLB after resume pages.
> +	 *
> +	 * Invalidations TLB Using tlbilx/tlbivax/MMUCSR0.
> +	 * tlbilx used here.
> +	 */
> +	bl	_tlbil_all

Applied with the code comment changed to:

        /*
         * Mappings from virtual addresses to physical addresses may be
         * different than they were prior to restoring hibernation state.
         * Invalidate the TLB so that the boot CPU is using the new
         * mappings.
         */

-Scott

Patch

diff --git a/arch/powerpc/kernel/swsusp_booke.S b/arch/powerpc/kernel/swsusp_booke.S
index 11a3930..9503249 100644
--- a/arch/powerpc/kernel/swsusp_booke.S
+++ b/arch/powerpc/kernel/swsusp_booke.S
@@ -141,6 +141,19 @@  _GLOBAL(swsusp_arch_resume)
 	lis	r11,swsusp_save_area@h
 	ori	r11,r11,swsusp_save_area@l
 
+	/*
+	 * The boot core get a virtual address, when the boot process,
+	 * the virtual address corresponds to a physical address. After
+	 * hibernation resume memory snapshots, The corresponding
+	 * relationship between the virtual memory and physical memory
+	 * might change again. We need to get a new page table. So we
+	 * need to invalidate TLB after resume pages.
+	 *
+	 * Invalidations TLB Using tlbilx/tlbivax/MMUCSR0.
+	 * tlbilx used here.
+	 */
+	bl	_tlbil_all
+
 	lwz	r4,SL_SPRG0(r11)
 	mtsprg	0,r4
 	lwz	r4,SL_SPRG1(r11)