Patchwork [U-Boot,v2,6/7] am335x_evm: Add support for the NOR module on the memory cape

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Submitter Tom Rini
Date May 13, 2013, 6:28 p.m.
Message ID <1368469719-22406-6-git-send-email-trini@ti.com>
Download mbox | patch
Permalink /patch/243489/
State Changes Requested
Delegated to: Tom Rini
Headers show

Comments

Tom Rini - May 13, 2013, 6:28 p.m.
From: Steve Kipisz <s-kipisz2@ti.com>

This patch adds support for the NOR module that attaches
to the memory cape for a Beaglebone board. This does not
add booting support; only support so that you can boot from
SD/MMC and see the NOR module so that it can be programmed.

Signed-off-by: Steve Kipisz <s-kipisz2@ti.com>
[trini: Clean up config changes slightly]
Signed-off-by: Tom Rini <trini@ti.com>

---
Changes in v2:
- Move GPMC config portion into board.c

Signed-off-by: Tom Rini <trini@ti.com>
---
 arch/arm/cpu/armv7/am33xx/mem.c        |    6 ++++
 arch/arm/include/asm/arch-am33xx/mem.h |    9 ++++++
 board/ti/am335x/board.c                |   13 ++++++++
 board/ti/am335x/mux.c                  |   53 ++++++++++++++++++++++++++++++++
 boards.cfg                             |    1 +
 include/configs/am335x_evm.h           |   28 +++++++++++++++++
 6 files changed, 110 insertions(+)
Peter Korsgaard - May 16, 2013, 2:32 p.m.
>>>>> "Tom" == Tom Rini <trini@ti.com> writes:

 Tom> From: Steve Kipisz <s-kipisz2@ti.com>
 Tom> This patch adds support for the NOR module that attaches
 Tom> to the memory cape for a Beaglebone board. This does not
 Tom> add booting support; only support so that you can boot from
 Tom> SD/MMC and see the NOR module so that it can be programmed.

 Tom> Signed-off-by: Steve Kipisz <s-kipisz2@ti.com>
 Tom> [trini: Clean up config changes slightly]
 Tom> Signed-off-by: Tom Rini <trini@ti.com>

 Tom> ---
 Tom> Changes in v2:
 Tom> - Move GPMC config portion into board.c

 Tom> Signed-off-by: Tom Rini <trini@ti.com>
 Tom> ---
 Tom>  arch/arm/cpu/armv7/am33xx/mem.c        |    6 ++++
 Tom>  arch/arm/include/asm/arch-am33xx/mem.h |    9 ++++++
 Tom>  board/ti/am335x/board.c                |   13 ++++++++
 Tom>  board/ti/am335x/mux.c                  |   53 ++++++++++++++++++++++++++++++++
 Tom>  boards.cfg                             |    1 +
 Tom>  include/configs/am335x_evm.h           |   28 +++++++++++++++++
 Tom>  6 files changed, 110 insertions(+)

 Tom> diff --git a/arch/arm/cpu/armv7/am33xx/mem.c b/arch/arm/cpu/armv7/am33xx/mem.c
 Tom> index 45f5426..923ea83 100644
 Tom> --- a/arch/arm/cpu/armv7/am33xx/mem.c
 Tom> +++ b/arch/arm/cpu/armv7/am33xx/mem.c
 Tom> @@ -77,9 +77,15 @@ void gpmc_init(void)
 
 Tom>  	/* global settings */
 Tom>  	writel(0x00000008, &gpmc_cfg->sysconfig);
 Tom> +#ifdef CONFIG_NOR
 Tom> +	writel(0x00000000, &gpmc_cfg->irqstatus);
 Tom> +	writel(0x00000000, &gpmc_cfg->irqenable);
 Tom> +	writel(0x00000A00, &gpmc_cfg->config);
 Tom> +#else
 Tom>  	writel(0x00000100, &gpmc_cfg->irqstatus);
 Tom>  	writel(0x00000100, &gpmc_cfg->irqenable);
 Tom>  	writel(0x00000012, &gpmc_cfg->config);
 Tom> +#endif

This looks to me as an indication that irqstatus/irqenable/config should
really be arguments of gpmc_init().

 Tom>  	/*
 Tom>  	 * Disable the GPMC0 config set by ROM code
 Tom>  	 */
 Tom> diff --git a/arch/arm/include/asm/arch-am33xx/mem.h b/arch/arm/include/asm/arch-am33xx/mem.h
 Tom> index c3bf74e..ddcad62 100644
 Tom> --- a/arch/arm/include/asm/arch-am33xx/mem.h
 Tom> +++ b/arch/arm/include/asm/arch-am33xx/mem.h
 Tom> @@ -61,6 +61,15 @@
 Tom>  #define M_NAND_GPMC_CONFIG6	0x16000f80
 Tom>  #define M_NAND_GPMC_CONFIG7	0x00000008
 
 Tom> +/* NOR chip on NOR module for Beaglebone */
 Tom> +#define STNOR_GPMC_CONFIG1	0x00001200
 Tom> +#define STNOR_GPMC_CONFIG2	0x00101000
 Tom> +#define STNOR_GPMC_CONFIG3	0x00030301
 Tom> +#define STNOR_GPMC_CONFIG4	0x10041004
 Tom> +#define STNOR_GPMC_CONFIG5	0x000C1010
 Tom> +#define STNOR_GPMC_CONFIG6	0x08070280
 Tom> +#define STNOR_GPMC_CONFIG7	0x00000F48

Why are these not in board/ti/am335x/board.{c,h} if they are beaglebone
specific?

 Tom> +
 Tom>  /* max number of GPMC Chip Selects */
 Tom>  #define GPMC_MAX_CS		8
 Tom>  /* max number of GPMC regs */
 Tom> diff --git a/board/ti/am335x/board.c b/board/ti/am335x/board.c
 Tom> index 0ee2f7e..3660655 100644
 Tom> --- a/board/ti/am335x/board.c
 Tom> +++ b/board/ti/am335x/board.c
 Tom> @@ -27,6 +27,7 @@
 Tom>  #include <asm/arch/gpio.h>
 Tom>  #include <asm/arch/mmc_host_def.h>
 Tom>  #include <asm/arch/sys_proto.h>
 Tom> +#include <asm/arch/mem.h>
 Tom>  #include <asm/io.h>
 Tom>  #include <asm/emif.h>
 Tom>  #include <asm/gpio.h>
 Tom> @@ -366,10 +367,22 @@ void s_init(void)
 Tom>   */
 Tom>  int board_init(void)
 Tom>  {
 Tom> +#ifdef CONFIG_NOR
 Tom> +	const u32 gpmc_nor[GPMC_MAX_REG] = { STNOR_GPMC_CONFIG1,
 Tom> +		STNOR_GPMC_CONFIG2, STNOR_GPMC_CONFIG3, STNOR_GPMC_CONFIG4,
 Tom> +		STNOR_GPMC_CONFIG5, STNOR_GPMC_CONFIG6, STNOR_GPMC_CONFIG7 };
 Tom> +#endif
 Tom> +gd-> bd->bi_boot_params = PHYS_DRAM_1 + 0x100;
 
 Tom>  	gpmc_init();
 
 Tom> +#ifdef CONFIG_NOR
 Tom> +	/* Reconfigure CS0 for NOR instead of NAND. */
 Tom> +	enable_gpmc_cs_config(gpmc_nor, &gpmc_cfg->cs[0],
 Tom> +			      CONFIG_SYS_FLASH_BASE, GPMC_SIZE_16M);
 Tom> +#endif
 Tom> +

Perhaps the nand handling should just get moved out of gpmc_init() (or
the _cs_config args should be passed to gpmc_init() ).


 Tom>  	return 0;
 Tom>  }
Tom Rini - May 16, 2013, 2:46 p.m.
On Thu, May 16, 2013 at 04:32:58PM +0200, Peter Korsgaard wrote:
> >>>>> "Tom" == Tom Rini <trini@ti.com> writes:
> 
>  Tom> From: Steve Kipisz <s-kipisz2@ti.com>
>  Tom> This patch adds support for the NOR module that attaches
>  Tom> to the memory cape for a Beaglebone board. This does not
>  Tom> add booting support; only support so that you can boot from
>  Tom> SD/MMC and see the NOR module so that it can be programmed.
[snip]
>  Tom> @@ -77,9 +77,15 @@ void gpmc_init(void)
>  
>  Tom>  	/* global settings */
>  Tom>  	writel(0x00000008, &gpmc_cfg->sysconfig);
>  Tom> +#ifdef CONFIG_NOR
>  Tom> +	writel(0x00000000, &gpmc_cfg->irqstatus);
>  Tom> +	writel(0x00000000, &gpmc_cfg->irqenable);
>  Tom> +	writel(0x00000A00, &gpmc_cfg->config);
>  Tom> +#else
>  Tom>  	writel(0x00000100, &gpmc_cfg->irqstatus);
>  Tom>  	writel(0x00000100, &gpmc_cfg->irqenable);
>  Tom>  	writel(0x00000012, &gpmc_cfg->config);
>  Tom> +#endif
> 
> This looks to me as an indication that irqstatus/irqenable/config should
> really be arguments of gpmc_init().

Perhaps.  I've still got an open poke about what's going on, exactly
here.

[snip]
>  Tom> +/* NOR chip on NOR module for Beaglebone */
>  Tom> +#define STNOR_GPMC_CONFIG1	0x00001200
>  Tom> +#define STNOR_GPMC_CONFIG2	0x00101000
>  Tom> +#define STNOR_GPMC_CONFIG3	0x00030301
>  Tom> +#define STNOR_GPMC_CONFIG4	0x10041004
>  Tom> +#define STNOR_GPMC_CONFIG5	0x000C1010
>  Tom> +#define STNOR_GPMC_CONFIG6	0x08070280
>  Tom> +#define STNOR_GPMC_CONFIG7	0x00000F48
> 
> Why are these not in board/ti/am335x/board.{c,h} if they are beaglebone
> specific?

The timings would be valid to anyone using the same NOR on a custom
chip.  I'll re-word the comment.

>  Tom> +#ifdef CONFIG_NOR
>  Tom> +	/* Reconfigure CS0 for NOR instead of NAND. */
>  Tom> +	enable_gpmc_cs_config(gpmc_nor, &gpmc_cfg->cs[0],
>  Tom> +			      CONFIG_SYS_FLASH_BASE, GPMC_SIZE_16M);
>  Tom> +#endif
>  Tom> +
> 
> Perhaps the nand handling should just get moved out of gpmc_init() (or
> the _cs_config args should be passed to gpmc_init() ).

I looked at this, on the scale of redoing omap3 too (where we have a lot
of existing examples).  The split we've got now works and it's harmless
to re-configure CS0 in the case where the defaults don't work.  I think
this would lead us to an abstraction that leads to a lot of board files
duplicating the same code.
Peter Korsgaard - May 16, 2013, 6:54 p.m.
>>>>> "Tom" == Tom Rini <trini@ti.com> writes:

Hi,
 
>> Perhaps the nand handling should just get moved out of gpmc_init() (or
 >> the _cs_config args should be passed to gpmc_init() ).

 Tom> I looked at this, on the scale of redoing omap3 too (where we have a lot
 Tom> of existing examples).  The split we've got now works and it's harmless
 Tom> to re-configure CS0 in the case where the defaults don't work.  I think
 Tom> this would lead us to an abstraction that leads to a lot of board files
 Tom> duplicating the same code.

Maybe the solution is simply to have:

init_gpmc_nand() and init_gpmc_nor()

?
Tom Rini - May 16, 2013, 7:27 p.m.
-----BEGIN PGP SIGNED MESSAGE-----
Hash: SHA1

On 05/16/2013 02:54 PM, Peter Korsgaard wrote:
>>>>>> "Tom" == Tom Rini <trini@ti.com> writes:
> 
> Hi,
> 
>>> Perhaps the nand handling should just get moved out of
>>> gpmc_init() (or the _cs_config args should be passed to
>>> gpmc_init() ).
> 
> Tom> I looked at this, on the scale of redoing omap3 too (where we
> have a lot Tom> of existing examples).  The split we've got now
> works and it's harmless Tom> to re-configure CS0 in the case where
> the defaults don't work.  I think Tom> this would lead us to an
> abstraction that leads to a lot of board files Tom> duplicating the
> same code.
> 
> Maybe the solution is simply to have:
> 
> init_gpmc_nand() and init_gpmc_nor()

It boils down to:
a) Give all of CS0 to NAND
b) Give all of CS0 to NOR
c) Split CS0 into some number of segments for whatever the board wants.

What I had looked at doing before posting was:
mem.c:
__weak void configure_gpmc_cs0() { enable nand }
gpmc_init() {
... general init ...
configure_gpmc_cs0()
}

board-fu:
void configure_gpmc_cs0() {
... let the board sort it out ...
}

But I ended up with one non-default on all of omap3,which just says
"lets re-program cs0 for our split".

- -- 
Tom
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Peter Korsgaard - May 16, 2013, 7:32 p.m.
>>>>> "Tom" == Tom Rini <trini@ti.com> writes:

Hi,

 Tom> But I ended up with one non-default on all of omap3,which just
 Tom> says "lets re-program cs0 for our split".

Ok, thanks.

Patch

diff --git a/arch/arm/cpu/armv7/am33xx/mem.c b/arch/arm/cpu/armv7/am33xx/mem.c
index 45f5426..923ea83 100644
--- a/arch/arm/cpu/armv7/am33xx/mem.c
+++ b/arch/arm/cpu/armv7/am33xx/mem.c
@@ -77,9 +77,15 @@  void gpmc_init(void)
 
 	/* global settings */
 	writel(0x00000008, &gpmc_cfg->sysconfig);
+#ifdef CONFIG_NOR
+	writel(0x00000000, &gpmc_cfg->irqstatus);
+	writel(0x00000000, &gpmc_cfg->irqenable);
+	writel(0x00000A00, &gpmc_cfg->config);
+#else
 	writel(0x00000100, &gpmc_cfg->irqstatus);
 	writel(0x00000100, &gpmc_cfg->irqenable);
 	writel(0x00000012, &gpmc_cfg->config);
+#endif
 	/*
 	 * Disable the GPMC0 config set by ROM code
 	 */
diff --git a/arch/arm/include/asm/arch-am33xx/mem.h b/arch/arm/include/asm/arch-am33xx/mem.h
index c3bf74e..ddcad62 100644
--- a/arch/arm/include/asm/arch-am33xx/mem.h
+++ b/arch/arm/include/asm/arch-am33xx/mem.h
@@ -61,6 +61,15 @@ 
 #define M_NAND_GPMC_CONFIG6	0x16000f80
 #define M_NAND_GPMC_CONFIG7	0x00000008
 
+/* NOR chip on NOR module for Beaglebone */
+#define STNOR_GPMC_CONFIG1	0x00001200
+#define STNOR_GPMC_CONFIG2	0x00101000
+#define STNOR_GPMC_CONFIG3	0x00030301
+#define STNOR_GPMC_CONFIG4	0x10041004
+#define STNOR_GPMC_CONFIG5	0x000C1010
+#define STNOR_GPMC_CONFIG6	0x08070280
+#define STNOR_GPMC_CONFIG7	0x00000F48
+
 /* max number of GPMC Chip Selects */
 #define GPMC_MAX_CS		8
 /* max number of GPMC regs */
diff --git a/board/ti/am335x/board.c b/board/ti/am335x/board.c
index 0ee2f7e..3660655 100644
--- a/board/ti/am335x/board.c
+++ b/board/ti/am335x/board.c
@@ -27,6 +27,7 @@ 
 #include <asm/arch/gpio.h>
 #include <asm/arch/mmc_host_def.h>
 #include <asm/arch/sys_proto.h>
+#include <asm/arch/mem.h>
 #include <asm/io.h>
 #include <asm/emif.h>
 #include <asm/gpio.h>
@@ -366,10 +367,22 @@  void s_init(void)
  */
 int board_init(void)
 {
+#ifdef CONFIG_NOR
+	const u32 gpmc_nor[GPMC_MAX_REG] = { STNOR_GPMC_CONFIG1,
+		STNOR_GPMC_CONFIG2, STNOR_GPMC_CONFIG3, STNOR_GPMC_CONFIG4,
+		STNOR_GPMC_CONFIG5, STNOR_GPMC_CONFIG6, STNOR_GPMC_CONFIG7 };
+#endif
+
 	gd->bd->bi_boot_params = PHYS_DRAM_1 + 0x100;
 
 	gpmc_init();
 
+#ifdef CONFIG_NOR
+	/* Reconfigure CS0 for NOR instead of NAND. */
+	enable_gpmc_cs_config(gpmc_nor, &gpmc_cfg->cs[0],
+			      CONFIG_SYS_FLASH_BASE, GPMC_SIZE_16M);
+#endif
+
 	return 0;
 }
 
diff --git a/board/ti/am335x/mux.c b/board/ti/am335x/mux.c
index 2e09d98..187468e 100644
--- a/board/ti/am335x/mux.c
+++ b/board/ti/am335x/mux.c
@@ -190,6 +190,56 @@  static struct module_pin_mux nand_pin_mux[] = {
 	{-1},
 };
 
+#if defined(CONFIG_NOR)
+static struct module_pin_mux bone_norcape_pin_mux[] = {
+	{OFFSET(lcd_data0), MODE(1) | PULLUDEN | RXACTIVE},     /* NOR_A0 */
+	{OFFSET(lcd_data1), MODE(1) | PULLUDEN | RXACTIVE},     /* NOR_A1 */
+	{OFFSET(lcd_data2), MODE(1) | PULLUDEN | RXACTIVE},     /* NOR_A2 */
+	{OFFSET(lcd_data3), MODE(1) | PULLUDEN | RXACTIVE},     /* NOR_A3 */
+	{OFFSET(lcd_data4), MODE(1) | PULLUDEN | RXACTIVE},     /* NOR_A4 */
+	{OFFSET(lcd_data5), MODE(1) | PULLUDEN | RXACTIVE},     /* NOR_A5 */
+	{OFFSET(lcd_data6), MODE(1) | PULLUDEN | RXACTIVE},     /* NOR_A6 */
+	{OFFSET(lcd_data7), MODE(1) | PULLUDEN | RXACTIVE},     /* NOR_A7 */
+	{OFFSET(lcd_vsync), MODE(1) | PULLUDEN | RXACTIVE},     /* NOR_A8 */
+	{OFFSET(lcd_hsync), MODE(1) | PULLUDEN | RXACTIVE},     /* NOR_A9 */
+	{OFFSET(lcd_pclk), MODE(1)| PULLUDEN | RXACTIVE},       /* NOR_A10 */
+	{OFFSET(lcd_ac_bias_en), MODE(1)| PULLUDEN | RXACTIVE}, /* NOR_A11 */
+	{OFFSET(lcd_data8), MODE(1) | PULLUDEN | RXACTIVE},     /* NOR_A12 */
+	{OFFSET(lcd_data9), MODE(1) | PULLUDEN | RXACTIVE},     /* NOR_A13 */
+	{OFFSET(lcd_data10), MODE(1) | PULLUDEN | RXACTIVE},    /* NOR_A14 */
+	{OFFSET(lcd_data11), MODE(1) | PULLUDEN | RXACTIVE},    /* NOR_A15 */
+	{OFFSET(lcd_data12), MODE(1) | PULLUDEN | RXACTIVE},    /* NOR_A16 */
+	{OFFSET(lcd_data13), MODE(1) | PULLUDEN | RXACTIVE},    /* NOR_A17 */
+	{OFFSET(lcd_data14), MODE(1) | PULLUDEN | RXACTIVE},    /* NOR_A18 */
+	{OFFSET(lcd_data15), MODE(1) | PULLUDEN | RXACTIVE},    /* NOR_A19 */
+	{OFFSET(gpmc_ad0), MODE(0) | PULLUDEN | RXACTIVE},      /* NOR_AD0 */
+	{OFFSET(gpmc_ad1), MODE(0) | PULLUDEN | RXACTIVE},      /* NOR_AD1 */
+	{OFFSET(gpmc_ad2), MODE(0) | PULLUDEN | RXACTIVE},      /* NOR_AD2 */
+	{OFFSET(gpmc_ad3), MODE(0) | PULLUDEN | RXACTIVE},      /* NOR_AD3 */
+	{OFFSET(gpmc_ad4), MODE(0) | PULLUDEN | RXACTIVE},      /* NOR_AD4 */
+	{OFFSET(gpmc_ad5), MODE(0) | PULLUDEN | RXACTIVE},      /* NOR_AD5 */
+	{OFFSET(gpmc_ad6), MODE(0) | PULLUDEN | RXACTIVE},      /* NOR_AD6 */
+	{OFFSET(gpmc_ad7), MODE(0) | PULLUDEN | RXACTIVE},      /* NOR_AD7 */
+	{OFFSET(gpmc_ad8), MODE(0) | PULLUDEN | RXACTIVE},      /* NOR_AD8 */
+	{OFFSET(gpmc_ad9), MODE(0) | PULLUDEN | RXACTIVE},      /* NOR_AD9 */
+	{OFFSET(gpmc_ad10), MODE(0) | PULLUDEN | RXACTIVE},     /* NOR_AD10 */
+	{OFFSET(gpmc_ad11), MODE(0) | PULLUDEN | RXACTIVE},     /* NOR_AD11 */
+	{OFFSET(gpmc_ad12), MODE(0) | PULLUDEN | RXACTIVE},     /* NOR_AD12 */
+	{OFFSET(gpmc_ad13), MODE(0) | PULLUDEN | RXACTIVE},     /* NOR_AD13 */
+	{OFFSET(gpmc_ad14), MODE(0) | PULLUDEN | RXACTIVE},     /* NOR_AD14 */
+	{OFFSET(gpmc_ad15), MODE(0) | PULLUDEN | RXACTIVE},     /* NOR_AD15 */
+
+	{OFFSET(gpmc_csn0), (MODE(0) | PULLUDEN) | RXACTIVE},   /* NOR_CE */
+	{OFFSET(gpmc_advn_ale), (MODE(0) | PULLUDEN) | RXACTIVE}, /* NOR_ADVN_ALE */
+	{OFFSET(gpmc_oen_ren), (MODE(0) | PULLUDEN | RXACTIVE)},/* NOR_OE */
+	{OFFSET(gpmc_be0n_cle), (MODE(0) | PULLUDEN | RXACTIVE)},/* NOR_BE0N_CLE */
+	{OFFSET(gpmc_wen), (MODE(0) | PULLUDEN | RXACTIVE)},    /* NOR_WEN */
+	{OFFSET(gpmc_wait0), (MODE(0) | RXACTIVE | PULLUDEN)}, /* NOR WAIT */
+	{-1},
+};
+#endif
+
+
 void enable_uart0_pin_mux(void)
 {
 	configure_module_pin_mux(uart0_pin_mux);
@@ -268,6 +318,9 @@  void enable_board_pin_mux(struct am335x_baseboard_id *header)
 		configure_module_pin_mux(mii1_pin_mux);
 		configure_module_pin_mux(mmc0_pin_mux);
 		configure_module_pin_mux(mmc1_pin_mux);
+#if defined(CONFIG_NOR)
+		configure_module_pin_mux(bone_norcape_pin_mux);
+#endif
 	} else if (board_is_gp_evm(header)) {
 		/* General Purpose EVM */
 		unsigned short profile = detect_daughter_board_profile();
diff --git a/boards.cfg b/boards.cfg
index 5d78064..d74840d 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -236,6 +236,7 @@  integratorap_cm946es         arm         arm946es    integrator          armltd
 integratorcp_cm946es         arm         arm946es    integrator          armltd         -               integratorcp:CM946ES
 ca9x4_ct_vxp                 arm         armv7       vexpress            armltd
 am335x_evm                   arm         armv7       am335x              ti             am33xx      am335x_evm:SERIAL1,CONS_INDEX=1
+am335x_evm_nor               arm         armv7       am335x              ti             am33xx      am335x_evm:SERIAL1,CONS_INDEX=1,NOR
 am335x_evm_spiboot           arm         armv7       am335x              ti             am33xx      am335x_evm:SERIAL1,CONS_INDEX=1,SPI_BOOT
 am335x_evm_uart1             arm         armv7       am335x              ti             am33xx      am335x_evm:SERIAL2,CONS_INDEX=2
 am335x_evm_uart2             arm         armv7       am335x              ti             am33xx      am335x_evm:SERIAL3,CONS_INDEX=3
diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h
index 3df0840..b4d57e1 100644
--- a/include/configs/am335x_evm.h
+++ b/include/configs/am335x_evm.h
@@ -494,4 +494,32 @@ 
 #define CONFIG_SYS_ENV_SECT_SIZE	(128 << 10)	/* 128 KiB */
 #endif
 
+/*
+ * NOR Size = 16 MiB
+ * Number of Sectors/Blocks = 128
+ * Sector Size = 128 KiB
+ * Word length = 16 bits
+ * Default layout:
+ * 0x000000 - 0x07FFFF : U-Boot (512 KiB)
+ * 0x080000 - 0x09FFFF : First copy of U-Boot Environment (128 KiB)
+ * 0x0A0000 - 0x0BFFFF : Second copy of U-Boot Environment (128 KiB)
+ * 0x0C0000 - 0x4BFFFF : Linux Kernel (4 MiB)
+ * 0x4C0000 - 0xFFFFFF : Userland (11 MiB + 256 KiB)
+ */
+#if defined(CONFIG_NOR)
+#undef CONFIG_SYS_NO_FLASH
+#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
+#define CONFIG_SYS_FLASH_PROTECTION
+#define CONFIG_SYS_FLASH_CFI
+#define CONFIG_FLASH_CFI_DRIVER
+#define CONFIG_FLASH_CFI_MTD
+#define CONFIG_SYS_MAX_FLASH_SECT	128
+#define CONFIG_SYS_MAX_FLASH_BANKS	1
+#define CONFIG_SYS_FLASH_BASE		(0x08000000)
+#define CONFIG_SYS_FLASH_CFI_WIDTH	FLASH_CFI_16BIT
+#define CONFIG_SYS_MONITOR_BASE		CONFIG_SYS_FLASH_BASE
+#define CONFIG_MTD_DEVICE
+#define CONFIG_CMD_FLASH
+#endif  /* NOR support */
+
 #endif	/* ! __CONFIG_AM335X_EVM_H */