Patchwork [U-Boot,v02,2/2] OMAP5: add ABB setup for MPU voltage domain

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Submitter Andrii Tseglytskyi
Date May 13, 2013, 4:49 p.m.
Message ID <1368463777-31980-3-git-send-email-andrii.tseglytskyi@ti.com>
Download mbox | patch
Permalink /patch/243463/
State Changes Requested
Delegated to: Tom Rini
Headers show

Comments

Andrii Tseglytskyi - May 13, 2013, 4:49 p.m.
Patch adds a call of abb_setup() function, and proper registers
definitions needed for ABB setup sequence. ABB is initialized
for MPU voltage domain.

Signed-off-by: Andrii Tseglytskyi <andrii.tseglytskyi@ti.com>
---
 arch/arm/cpu/armv7/omap-common/clocks-common.c |    9 +++++++++
 arch/arm/cpu/armv7/omap5/prcm-regs.c           |    7 +++++++
 2 files changed, 16 insertions(+)
Nishanth Menon - May 17, 2013, 1:01 p.m.
On 19:49-20130513, Andrii Tseglytskyi wrote:
> Patch adds a call of abb_setup() function, and proper registers
> definitions needed for ABB setup sequence. ABB is initialized
> for MPU voltage domain.
> 
> Signed-off-by: Andrii Tseglytskyi <andrii.tseglytskyi@ti.com>
> ---
>  arch/arm/cpu/armv7/omap-common/clocks-common.c |    9 +++++++++
>  arch/arm/cpu/armv7/omap5/prcm-regs.c           |    7 +++++++
>  2 files changed, 16 insertions(+)
> 
> diff --git a/arch/arm/cpu/armv7/omap-common/clocks-common.c b/arch/arm/cpu/armv7/omap-common/clocks-common.c
> index 2b955c7..bdecaf8 100644
> --- a/arch/arm/cpu/armv7/omap-common/clocks-common.c
> +++ b/arch/arm/cpu/armv7/omap-common/clocks-common.c
> @@ -533,6 +533,15 @@ void scale_vcores(struct vcores_data const *vcores)
>  	do_scale_vcore(vcores->mpu.addr, vcores->mpu.value,
>  					  vcores->mpu.pmic);
>  
> +	/* Configure MPU ABB LDO after scale */
> +	abb_setup((*ctrl)->control_std_fuse_opp_vdd_mpu_2,
> +		  (*ctrl)->control_wkup_ldovbb_mpu_voltage_ctrl,
> +		  (*prcm)->prm_abbldo_mpu_setup,
> +		  (*prcm)->prm_abbldo_mpu_ctrl,
> +		  (*prcm)->prm_irqstatus_mpu_2,
> +		  OMAP_ABB_MPU_TXDONE_MASK,
> +		  OMAP_ABB_FAST_OPP);
> +
>  	do_scale_vcore(vcores->mm.addr, vcores->mm.value,
>  					  vcores->mm.pmic);
>  
> diff --git a/arch/arm/cpu/armv7/omap5/prcm-regs.c b/arch/arm/cpu/armv7/omap5/prcm-regs.c
> index b8a61fe..b4b624e 100644
> --- a/arch/arm/cpu/armv7/omap5/prcm-regs.c
> +++ b/arch/arm/cpu/armv7/omap5/prcm-regs.c
> @@ -311,6 +311,7 @@ struct prcm_regs const omap5_es1_prcm = {
>  
>  struct omap_sys_ctrl_regs const omap5_ctrl = {
>  	.control_status				= 0x4A002134,
> +	.control_std_fuse_opp_vdd_mpu_2		= 0x4A0021B4,
>  	.control_paconf_global			= 0x4A002DA0,
>  	.control_paconf_mode			= 0x4A002DA4,
>  	.control_smart1io_padconf_0		= 0x4A002DA8,
> @@ -358,6 +359,7 @@ struct omap_sys_ctrl_regs const omap5_ctrl = {
>  	.control_port_emif2_sdram_config	= 0x4AE0C118,
>  	.control_emif1_sdram_config_ext		= 0x4AE0C144,
>  	.control_emif2_sdram_config_ext		= 0x4AE0C148,
> +	.control_wkup_ldovbb_mpu_voltage_ctrl	= 0x4AE0C318,
>  	.control_smart1nopmio_padconf_0		= 0x4AE0CDA0,
>  	.control_smart1nopmio_padconf_1		= 0x4AE0CDA4,
>  	.control_padconf_mode			= 0x4AE0CDA8,
> @@ -709,6 +711,9 @@ struct prcm_regs const omap5_es2_prcm = {
>  	.cm_l3init_fsusb_clkctrl = 0x4a0096d0,
>  	.cm_l3init_ocp2scp1_clkctrl = 0x4a0096e0,
>  
> +	/* prm irqstatus regs */
> +	.prm_irqstatus_mpu_2 = 0x4ae06014,
> +
>  	/* l4 wkup regs */
>  	.cm_abe_pll_ref_clksel = 0x4ae0610c,
>  	.cm_sys_clksel = 0x4ae06110,
> @@ -739,6 +744,8 @@ struct prcm_regs const omap5_es2_prcm = {
>  	.prm_sldo_mpu_ctrl = 0x4ae07cd0,
>  	.prm_sldo_mm_setup = 0x4ae07cd4,
>  	.prm_sldo_mm_ctrl = 0x4ae07cd8,
> +	.prm_abbldo_mpu_setup = 0x4ae07cdc,
> +	.prm_abbldo_mpu_ctrl = 0x4ae07ce0,
>  };
>  
>  struct prcm_regs const dra7xx_prcm = {
> -- 
> 1.7.9.5
> 
Overall ok with this, though, I'd like to wait a week before acking this
formally(I should get samples where I can test this out) - further there is
comments that I'd like to share on #1/2

Patch

diff --git a/arch/arm/cpu/armv7/omap-common/clocks-common.c b/arch/arm/cpu/armv7/omap-common/clocks-common.c
index 2b955c7..bdecaf8 100644
--- a/arch/arm/cpu/armv7/omap-common/clocks-common.c
+++ b/arch/arm/cpu/armv7/omap-common/clocks-common.c
@@ -533,6 +533,15 @@  void scale_vcores(struct vcores_data const *vcores)
 	do_scale_vcore(vcores->mpu.addr, vcores->mpu.value,
 					  vcores->mpu.pmic);
 
+	/* Configure MPU ABB LDO after scale */
+	abb_setup((*ctrl)->control_std_fuse_opp_vdd_mpu_2,
+		  (*ctrl)->control_wkup_ldovbb_mpu_voltage_ctrl,
+		  (*prcm)->prm_abbldo_mpu_setup,
+		  (*prcm)->prm_abbldo_mpu_ctrl,
+		  (*prcm)->prm_irqstatus_mpu_2,
+		  OMAP_ABB_MPU_TXDONE_MASK,
+		  OMAP_ABB_FAST_OPP);
+
 	do_scale_vcore(vcores->mm.addr, vcores->mm.value,
 					  vcores->mm.pmic);
 
diff --git a/arch/arm/cpu/armv7/omap5/prcm-regs.c b/arch/arm/cpu/armv7/omap5/prcm-regs.c
index b8a61fe..b4b624e 100644
--- a/arch/arm/cpu/armv7/omap5/prcm-regs.c
+++ b/arch/arm/cpu/armv7/omap5/prcm-regs.c
@@ -311,6 +311,7 @@  struct prcm_regs const omap5_es1_prcm = {
 
 struct omap_sys_ctrl_regs const omap5_ctrl = {
 	.control_status				= 0x4A002134,
+	.control_std_fuse_opp_vdd_mpu_2		= 0x4A0021B4,
 	.control_paconf_global			= 0x4A002DA0,
 	.control_paconf_mode			= 0x4A002DA4,
 	.control_smart1io_padconf_0		= 0x4A002DA8,
@@ -358,6 +359,7 @@  struct omap_sys_ctrl_regs const omap5_ctrl = {
 	.control_port_emif2_sdram_config	= 0x4AE0C118,
 	.control_emif1_sdram_config_ext		= 0x4AE0C144,
 	.control_emif2_sdram_config_ext		= 0x4AE0C148,
+	.control_wkup_ldovbb_mpu_voltage_ctrl	= 0x4AE0C318,
 	.control_smart1nopmio_padconf_0		= 0x4AE0CDA0,
 	.control_smart1nopmio_padconf_1		= 0x4AE0CDA4,
 	.control_padconf_mode			= 0x4AE0CDA8,
@@ -709,6 +711,9 @@  struct prcm_regs const omap5_es2_prcm = {
 	.cm_l3init_fsusb_clkctrl = 0x4a0096d0,
 	.cm_l3init_ocp2scp1_clkctrl = 0x4a0096e0,
 
+	/* prm irqstatus regs */
+	.prm_irqstatus_mpu_2 = 0x4ae06014,
+
 	/* l4 wkup regs */
 	.cm_abe_pll_ref_clksel = 0x4ae0610c,
 	.cm_sys_clksel = 0x4ae06110,
@@ -739,6 +744,8 @@  struct prcm_regs const omap5_es2_prcm = {
 	.prm_sldo_mpu_ctrl = 0x4ae07cd0,
 	.prm_sldo_mm_setup = 0x4ae07cd4,
 	.prm_sldo_mm_ctrl = 0x4ae07cd8,
+	.prm_abbldo_mpu_setup = 0x4ae07cdc,
+	.prm_abbldo_mpu_ctrl = 0x4ae07ce0,
 };
 
 struct prcm_regs const dra7xx_prcm = {