From patchwork Mon May 13 06:57:48 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Rigby X-Patchwork-Id: 243302 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id E24662C009D for ; Mon, 13 May 2013 16:59:06 +1000 (EST) Received: from localhost ([::1]:57708 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Ubmiu-0000QB-Vh for incoming@patchwork.ozlabs.org; Mon, 13 May 2013 02:59:05 -0400 Received: from eggs.gnu.org ([208.118.235.92]:50905) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UbmiK-0000M6-IG for qemu-devel@nongnu.org; Mon, 13 May 2013 02:58:31 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1UbmiH-0000DH-Fa for qemu-devel@nongnu.org; Mon, 13 May 2013 02:58:28 -0400 Received: from mail-pd0-f171.google.com ([209.85.192.171]:42360) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UbmiH-0000CM-9U for qemu-devel@nongnu.org; Mon, 13 May 2013 02:58:25 -0400 Received: by mail-pd0-f171.google.com with SMTP id r11so4194514pdi.2 for ; Sun, 12 May 2013 23:58:24 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-received:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references:x-gm-message-state; bh=2JGLOlx219l5Q2X/yiHQBuaEIiuq0BzaWz5xsW8IEzA=; b=CyLdxlrfd0FmFOnapnrlMw1Mx8vJlItJ3TN7PkXMj8jPjOpPIYfZcyYe5wxJc59WSY bkVUJUSL9CUOMPUz1PU0fyFyyBc3OgMpKwWyfu+eHmdI+M1WI1QhWmUkXfSREt2jM6Pw slsCIL+8EPUBtv2duYqSJO/DdOAIOeDYJ+ORrk4JNHLvxKuvvmrC3D9AMwRV98lf2Ye3 NDqkgI8YyLLlDbeIx5I0yMWCZgNUj/UPiFJoI8gjaHJ2DYCUidteNhmafecoFKRRkR1f knICr4aVW/8DzCUgLm0kaEti20o7HPXsRc4J/YdpxuJi6z3dx3DLFI33td4F2D6LEqHV 59oA== X-Received: by 10.68.242.97 with SMTP id wp1mr27629087pbc.128.1368428304447; Sun, 12 May 2013 23:58:24 -0700 (PDT) Received: from localhost.localdomain (c-76-23-54-220.hsd1.ut.comcast.net. [76.23.54.220]) by mx.google.com with ESMTPSA id gc5sm12871307pbb.19.2013.05.12.23.58.21 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Sun, 12 May 2013 23:58:23 -0700 (PDT) From: John Rigby To: qemu-devel@nongnu.org Date: Mon, 13 May 2013 00:57:48 -0600 Message-Id: <1368428278-29299-2-git-send-email-john.rigby@linaro.org> X-Mailer: git-send-email 1.8.2.2 In-Reply-To: <1368428278-29299-1-git-send-email-john.rigby@linaro.org> References: <1368428278-29299-1-git-send-email-john.rigby@linaro.org> X-Gm-Message-State: ALoCoQkQSw2qagldcKuXGVXSED5rO/wJjyoNqZjbX2aJc+eO3iAeOjpmK7CWMjQSmOf9vA8lnysr X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.85.192.171 Cc: 'Peter Maydell , John Rigby , Alexander Graf , Paul Brook Subject: [Qemu-devel] [PATCH v3 resend 01/11] ARM: Export cpu_env X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Alexander Graf The cpu_env tcg variable will be used by both the AArch32 and AArch64 handling code. Unstaticify it, so that both sides can make use of it. Signed-off-by: Alexander Graf Signed-off-by: John Rigby --- Changes in v3: - None because consensus alternative to non static arm cpu_env was not clean and Richard Henderson pointed out that microblaze was still static so no conflict ... yet. target-arm/translate.c | 2 +- target-arm/translate.h | 2 ++ 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/target-arm/translate.c b/target-arm/translate.c index 675773a..36537bd 100644 --- a/target-arm/translate.c +++ b/target-arm/translate.c @@ -59,7 +59,7 @@ static uint32_t gen_opc_condexec_bits[OPC_BUF_SIZE]; #define DISAS_WFI 4 #define DISAS_SWI 5 -static TCGv_ptr cpu_env; +TCGv_ptr cpu_env; /* We reuse the same 64-bit temporaries for efficiency. */ static TCGv_i64 cpu_V0, cpu_V1, cpu_M0; static TCGv_i32 cpu_R[16]; diff --git a/target-arm/translate.h b/target-arm/translate.h index e727bc6..8ba1433 100644 --- a/target-arm/translate.h +++ b/target-arm/translate.h @@ -24,4 +24,6 @@ typedef struct DisasContext { int vec_stride; } DisasContext; +extern TCGv_ptr cpu_env; + #endif /* TARGET_ARM_TRANSLATE_H */