Patchwork [v2] target-mips: clean-up in BIT_INSV

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Submitter Petar Jovanovic
Date May 13, 2013, 1:35 a.m.
Message ID <1368408937-114555-1-git-send-email-petar.jovanovic@rt-rk.com>
Download mbox | patch
Permalink /patch/243231/
State New
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Comments

Petar Jovanovic - May 13, 2013, 1:35 a.m.
From: Petar Jovanovic <petar.jovanovic@imgtec.com>

This is a small follow-up change to "fix incorrect behaviour for INSV".

It includes two minor modifications:

- sizefilter is constant so it can be moved inside of the block,
- several lines of the code are replaced with a call to deposit64.

No functional change.

Signed-off-by: Petar Jovanovic <petar.jovanovic@imgtec.com>
---
 v2:

 - version one was based on Aurelien comments,
 - version two includes update (use of deposit64 helper) per Peter
   Maydell's suggestion.

 target-mips/dsp_helper.c |   17 +++++++----------
 1 file changed, 7 insertions(+), 10 deletions(-)
Aurelien Jarno - May 17, 2013, 5:41 p.m.
On Mon, May 13, 2013 at 03:35:37AM +0200, Petar Jovanovic wrote:
> From: Petar Jovanovic <petar.jovanovic@imgtec.com>
> 
> This is a small follow-up change to "fix incorrect behaviour for INSV".
> 
> It includes two minor modifications:
> 
> - sizefilter is constant so it can be moved inside of the block,
> - several lines of the code are replaced with a call to deposit64.
> 
> No functional change.
> 
> Signed-off-by: Petar Jovanovic <petar.jovanovic@imgtec.com>
> ---
>  v2:
> 
>  - version one was based on Aurelien comments,
>  - version two includes update (use of deposit64 helper) per Peter
>    Maydell's suggestion.
> 
>  target-mips/dsp_helper.c |   17 +++++++----------
>  1 file changed, 7 insertions(+), 10 deletions(-)

This version is indeed better. I have applied it in my queue for after
1.6, replacing the previous version. Thanks.

> diff --git a/target-mips/dsp_helper.c b/target-mips/dsp_helper.c
> index 9212789..af2aa05 100644
> --- a/target-mips/dsp_helper.c
> +++ b/target-mips/dsp_helper.c
> @@ -19,6 +19,7 @@
>  
>  #include "cpu.h"
>  #include "helper.h"
> +#include "qemu/bitops.h"
>  
>  /* As the byte ordering doesn't matter, i.e. all columns are treated
>     identically, these unions can be used directly.  */
> @@ -2900,13 +2901,13 @@ target_ulong helper_bitrev(target_ulong rt)
>      return (target_ulong)rd;
>  }
>  
> -#define BIT_INSV(name, posfilter, sizefilter, ret_type)         \
> +#define BIT_INSV(name, posfilter, ret_type)                     \
>  target_ulong helper_##name(CPUMIPSState *env, target_ulong rs,  \
>                             target_ulong rt)                     \
>  {                                                               \
>      uint32_t pos, size, msb, lsb;                               \
> -    target_ulong filter;                                        \
> -    target_ulong temp, temprs, temprt;                          \
> +    uint32_t const sizefilter = 0x3F;                           \
> +    target_ulong temp;                                          \
>      target_ulong dspc;                                          \
>                                                                  \
>      dspc = env->active_tc.DSPControl;                           \
> @@ -2921,18 +2922,14 @@ target_ulong helper_##name(CPUMIPSState *env, target_ulong rs,  \
>          return rt;                                              \
>      }                                                           \
>                                                                  \
> -    filter = ((int64_t)0x01 << size) - 1;                       \
> -    filter = filter << pos;                                     \
> -    temprs = (rs << pos) & filter;                              \
> -    temprt = rt & ~filter;                                      \
> -    temp = temprs | temprt;                                     \
> +    temp = deposit64(rt, pos, size, rs);                        \
>                                                                  \
>      return (target_long)(ret_type)temp;                         \
>  }
>  
> -BIT_INSV(insv, 0x1F, 0x3F, int32_t);
> +BIT_INSV(insv, 0x1F, int32_t);
>  #ifdef TARGET_MIPS64
> -BIT_INSV(dinsv, 0x7F, 0x3F, target_long);
> +BIT_INSV(dinsv, 0x7F, target_long);
>  #endif
>  
>  #undef BIT_INSV
> -- 
> 1.7.9.5
> 
>

Patch

diff --git a/target-mips/dsp_helper.c b/target-mips/dsp_helper.c
index 9212789..af2aa05 100644
--- a/target-mips/dsp_helper.c
+++ b/target-mips/dsp_helper.c
@@ -19,6 +19,7 @@ 
 
 #include "cpu.h"
 #include "helper.h"
+#include "qemu/bitops.h"
 
 /* As the byte ordering doesn't matter, i.e. all columns are treated
    identically, these unions can be used directly.  */
@@ -2900,13 +2901,13 @@  target_ulong helper_bitrev(target_ulong rt)
     return (target_ulong)rd;
 }
 
-#define BIT_INSV(name, posfilter, sizefilter, ret_type)         \
+#define BIT_INSV(name, posfilter, ret_type)                     \
 target_ulong helper_##name(CPUMIPSState *env, target_ulong rs,  \
                            target_ulong rt)                     \
 {                                                               \
     uint32_t pos, size, msb, lsb;                               \
-    target_ulong filter;                                        \
-    target_ulong temp, temprs, temprt;                          \
+    uint32_t const sizefilter = 0x3F;                           \
+    target_ulong temp;                                          \
     target_ulong dspc;                                          \
                                                                 \
     dspc = env->active_tc.DSPControl;                           \
@@ -2921,18 +2922,14 @@  target_ulong helper_##name(CPUMIPSState *env, target_ulong rs,  \
         return rt;                                              \
     }                                                           \
                                                                 \
-    filter = ((int64_t)0x01 << size) - 1;                       \
-    filter = filter << pos;                                     \
-    temprs = (rs << pos) & filter;                              \
-    temprt = rt & ~filter;                                      \
-    temp = temprs | temprt;                                     \
+    temp = deposit64(rt, pos, size, rs);                        \
                                                                 \
     return (target_long)(ret_type)temp;                         \
 }
 
-BIT_INSV(insv, 0x1F, 0x3F, int32_t);
+BIT_INSV(insv, 0x1F, int32_t);
 #ifdef TARGET_MIPS64
-BIT_INSV(dinsv, 0x7F, 0x3F, target_long);
+BIT_INSV(dinsv, 0x7F, target_long);
 #endif
 
 #undef BIT_INSV