Patchwork [5/n,i386] : Simplify vec_extract post-reload splitters

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Submitter Uros Bizjak
Date May 8, 2013, 6:04 p.m.
Message ID <CAFULd4YzXFj-O3Srkg8GP3F8U9nf3ZaxPw1UxRo5N8C-2EaCgQ@mail.gmail.com>
Download mbox | patch
Permalink /patch/242616/
State New
Headers show

Comments

Uros Bizjak - May 8, 2013, 6:04 p.m.
Hello!

We don't have to use emit_move_insn here, the same can be achieved in
the (post-reload) splitter body:

-  [(const_int 0)]
-{
-  operands[1] = adjust_address (operands[1], SImode, 4);
-  emit_move_insn (operands[0], operands[1]);
-  DONE;
-})
+  [(set (match_dup 0) (match_dup 1))]
+  "operands[1] = adjust_address (operands[1], SImode, 4);")

Following patch normalizes all similar contructs throughout the *.md
files to the form above. Also, fix one wrong use of adjust_address_nv
- the no-verify version should be used only in insn template printing.

2013-05-08  Uros Bizjak  <ubizjak@gmail.com>

    * config/i386/mmx.md (*vec_extract* splitters): Simplify post-reload
    splitter preparation statements.
    * config/i386/sse.md (*vec_extract* splitters): Ditto.
    (*avx_vperm_broadcast_<mode>): Use adjust_address instead of
    adjust_address_nv.

Tested on x86_64-pc-linux-gnu {,-m32}  and committed to mainline SVN.

Uros.

Patch

Index: mmx.md
===================================================================
--- mmx.md	(revision 198712)
+++ mmx.md	(working copy)
@@ -594,15 +594,12 @@ 
   "TARGET_MMX && !(MEM_P (operands[0]) && MEM_P (operands[1]))"
   "#"
   "&& reload_completed"
-  [(const_int 0)]
+  [(set (match_dup 0) (match_dup 1))]
 {
-  rtx op1 = operands[1];
-  if (REG_P (op1))
-    op1 = gen_rtx_REG (SFmode, REGNO (op1));
+  if (REG_P (operands[1]))
+    operands[1] = gen_rtx_REG (SFmode, REGNO (operands[1]));
   else
-    op1 = gen_lowpart (SFmode, op1);
-  emit_move_insn (operands[0], op1);
-  DONE;
+    operands[1] = adjust_address (operands[1], SFmode, 0);
 })
 
 ;; Avoid combining registers from different units in a single alternative,
@@ -629,12 +626,8 @@ 
 	  (match_operand:V2SF 1 "memory_operand")
 	  (parallel [(const_int 1)])))]
   "TARGET_MMX && reload_completed"
-  [(const_int 0)]
-{
-  operands[1] = adjust_address (operands[1], SFmode, 4);
-  emit_move_insn (operands[0], operands[1]);
-  DONE;
-})
+  [(set (match_dup 0) (match_dup 1))]
+  "operands[1] = adjust_address (operands[1], SFmode, 4);")
 
 (define_expand "vec_extractv2sf"
   [(match_operand:SF 0 "register_operand")
@@ -1289,15 +1282,12 @@ 
   "TARGET_MMX && !(MEM_P (operands[0]) && MEM_P (operands[1]))"
   "#"
   "&& reload_completed"
-  [(const_int 0)]
+  [(set (match_dup 0) (match_dup 1))]
 {
-  rtx op1 = operands[1];
-  if (REG_P (op1))
-    op1 = gen_rtx_REG (SImode, REGNO (op1));
+  if (REG_P (operands[1]))
+    operands[1] = gen_rtx_REG (SImode, REGNO (operands[1]));
   else
-    op1 = gen_lowpart (SImode, op1);
-  emit_move_insn (operands[0], op1);
-  DONE;
+    operands[1] = adjust_address (operands[1], SImode, 0);
 })
 
 ;; Avoid combining registers from different units in a single alternative,
@@ -1330,12 +1320,8 @@ 
 	  (match_operand:V2SI 1 "memory_operand")
 	  (parallel [(const_int 1)])))]
   "TARGET_MMX && reload_completed"
-  [(const_int 0)]
-{
-  operands[1] = adjust_address (operands[1], SImode, 4);
-  emit_move_insn (operands[0], operands[1]);
-  DONE;
-})
+  [(set (match_dup 0) (match_dup 1))]
+  "operands[1] = adjust_address (operands[1], SImode, 4);")
 
 (define_expand "vec_extractv2si"
   [(match_operand:SI 0 "register_operand")
Index: sse.md
===================================================================
--- sse.md	(revision 198713)
+++ sse.md	(working copy)
@@ -4277,12 +4277,8 @@ 
 	  (match_dup 0)
 	  (const_int 1)))]
   "TARGET_SSE && reload_completed"
-  [(const_int 0)]
-{
-  emit_move_insn (adjust_address (operands[0], <ssescalarmode>mode, 0),
-		  operands[1]);
-  DONE;
-})
+  [(set (match_dup 0) (match_dup 1))]
+  "operands[0] = adjust_address (operands[0], <ssescalarmode>mode, 0);")
 
 (define_expand "vec_set<mode>"
   [(match_operand:V 0 "register_operand")
@@ -4362,12 +4358,9 @@ 
   "TARGET_SSE"
   "#"
   "&& reload_completed"
-  [(const_int 0)]
+  [(set (match_dup 0) (match_dup 1))]
 {
-  int i = INTVAL (operands[2]);
-
-  emit_move_insn (operands[0], adjust_address (operands[1], SFmode, i*4));
-  DONE;
+  operands[1] = adjust_address (operands[1], SFmode, INTVAL (operands[2]) * 4);
 })
 
 (define_expand "avx_vextractf128<mode>"
@@ -10654,8 +10647,8 @@ 
       DONE;
     }
 
-  operands[1] = adjust_address_nv (op1, <ssescalarmode>mode,
-				   elt * GET_MODE_SIZE (<ssescalarmode>mode));
+  operands[1] = adjust_address (op1, <ssescalarmode>mode,
+				elt * GET_MODE_SIZE (<ssescalarmode>mode));
 })
 
 (define_expand "avx_vpermil<mode>"