From patchwork Mon May 6 13:53:53 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexander Shiyan X-Patchwork-Id: 241676 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from casper.infradead.org (casper.infradead.org [IPv6:2001:770:15f::2]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 387D82C00E8 for ; Mon, 6 May 2013 23:56:34 +1000 (EST) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1UZLst-00083f-Jq; Mon, 06 May 2013 13:55:20 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1UZLsX-0004sU-Vf; Mon, 06 May 2013 13:54:57 +0000 Received: from smtp41.i.mail.ru ([94.100.177.101]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1UZLsB-0004lu-Cc for linux-mtd@lists.infradead.org; Mon, 06 May 2013 13:54:46 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mail.ru; s=mail2; h=References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From; bh=0mBoBGzgsxlRSi3q9MTs8Z09NFjYEGEv+9M9s+1hw0o=; b=l9Kb3UNkjEOjQiAjDbRCjv2jaggZ0gP4hJ5itD5pyPA6pkv7Uu5TinpZNUYJs32kTBE0The/kX75GpFTCgsByCb+drya9li9JF6D9pARYLRMf+vL836LqqYIFBq4kboNRZV6Q4h07kJZM0gQQJQYc+eJniE+LxbaOkkg1XGmW6Y=; Received: from [188.134.40.128] (port=8402 helo=shc.zet) by smtp41.i.mail.ru with esmtpa (envelope-from ) id 1UZLrp-0007fX-Ik; Mon, 06 May 2013 17:54:13 +0400 From: Alexander Shiyan To: linux-mtd@lists.infradead.org Subject: [RESEND PATCH v2 6/7] mtd: nand-gpio: Rename internal variables to match functionality Date: Mon, 6 May 2013 17:53:53 +0400 Message-Id: <1367848434-28493-6-git-send-email-shc_work@mail.ru> X-Mailer: git-send-email 1.8.1.5 In-Reply-To: <1367848434-28493-1-git-send-email-shc_work@mail.ru> References: <1367848434-28493-1-git-send-email-shc_work@mail.ru> X-Spam: Not detected X-Mras: Ok X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130506_095435_926596_BE250FE1 X-CRM114-Status: GOOD ( 10.84 ) X-Spam-Score: -2.0 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.0 points) pts rule name description ---- ---------------------- -------------------------------------------------- 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider (shc_work[at]mail.ru) -0.0 SPF_PASS SPF: sender matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature Cc: Artem Bityutskiy , Brian Norris , David Woodhouse , Alexander Shiyan X-BeenThere: linux-mtd@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Linux MTD discussion mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-mtd" Errors-To: linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org struct platform_device *dev => pdev struct nand_chip *this => chip Signed-off-by: Alexander Shiyan --- drivers/mtd/nand/gpio.c | 60 ++++++++++++++++++++++++------------------------- 1 file changed, 30 insertions(+), 30 deletions(-) diff --git a/drivers/mtd/nand/gpio.c b/drivers/mtd/nand/gpio.c index 312c285..6bf8f2e 100644 --- a/drivers/mtd/nand/gpio.c +++ b/drivers/mtd/nand/gpio.c @@ -186,9 +186,9 @@ gpio_nand_get_io_sync(struct platform_device *pdev) return platform_get_resource(pdev, IORESOURCE_MEM, 1); } -static int gpio_nand_remove(struct platform_device *dev) +static int gpio_nand_remove(struct platform_device *pdev) { - struct gpiomtd *gpiomtd = platform_get_drvdata(dev); + struct gpiomtd *gpiomtd = platform_get_drvdata(pdev); nand_release(&gpiomtd->mtd_info); @@ -199,82 +199,82 @@ static int gpio_nand_remove(struct platform_device *dev) return 0; } -static int gpio_nand_probe(struct platform_device *dev) +static int gpio_nand_probe(struct platform_device *pdev) { struct gpiomtd *gpiomtd; - struct nand_chip *this; + struct nand_chip *chip; struct resource *res; struct mtd_part_parser_data ppdata = {}; int ret = 0; - if (!dev->dev.of_node && !dev->dev.platform_data) + if (!pdev->dev.of_node && !pdev->dev.platform_data) return -EINVAL; - gpiomtd = devm_kzalloc(&dev->dev, sizeof(*gpiomtd), GFP_KERNEL); + gpiomtd = devm_kzalloc(&pdev->dev, sizeof(*gpiomtd), GFP_KERNEL); if (!gpiomtd) { - dev_err(&dev->dev, "failed to create NAND MTD\n"); + dev_err(&pdev->dev, "failed to create NAND MTD\n"); return -ENOMEM; } - this = &gpiomtd->nand_chip; + chip = &gpiomtd->nand_chip; - res = platform_get_resource(dev, IORESOURCE_MEM, 0); - this->IO_ADDR_R = devm_ioremap_resource(&dev->dev, res); - if (IS_ERR(this->IO_ADDR_R)) - return PTR_ERR(this->IO_ADDR_R); + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + chip->IO_ADDR_R = devm_ioremap_resource(&pdev->dev, res); + if (IS_ERR(chip->IO_ADDR_R)) + return PTR_ERR(chip->IO_ADDR_R); - res = gpio_nand_get_io_sync(dev); + res = gpio_nand_get_io_sync(pdev); if (res) { - gpiomtd->io_sync = devm_ioremap_resource(&dev->dev, res); + gpiomtd->io_sync = devm_ioremap_resource(&pdev->dev, res); if (IS_ERR(gpiomtd->io_sync)) return PTR_ERR(gpiomtd->io_sync); } - ret = gpio_nand_get_config(&dev->dev, &gpiomtd->plat); + ret = gpio_nand_get_config(&pdev->dev, &gpiomtd->plat); if (ret) return ret; - ret = devm_gpio_request(&dev->dev, gpiomtd->plat.gpio_nce, "NAND NCE"); + ret = devm_gpio_request(&pdev->dev, gpiomtd->plat.gpio_nce, "NAND NCE"); if (ret) return ret; gpio_direction_output(gpiomtd->plat.gpio_nce, 1); if (gpio_is_valid(gpiomtd->plat.gpio_nwp)) { - ret = devm_gpio_request(&dev->dev, gpiomtd->plat.gpio_nwp, + ret = devm_gpio_request(&pdev->dev, gpiomtd->plat.gpio_nwp, "NAND NWP"); if (ret) return ret; } - ret = devm_gpio_request(&dev->dev, gpiomtd->plat.gpio_ale, "NAND ALE"); + ret = devm_gpio_request(&pdev->dev, gpiomtd->plat.gpio_ale, "NAND ALE"); if (ret) return ret; gpio_direction_output(gpiomtd->plat.gpio_ale, 0); - ret = devm_gpio_request(&dev->dev, gpiomtd->plat.gpio_cle, "NAND CLE"); + ret = devm_gpio_request(&pdev->dev, gpiomtd->plat.gpio_cle, "NAND CLE"); if (ret) return ret; gpio_direction_output(gpiomtd->plat.gpio_cle, 0); if (gpio_is_valid(gpiomtd->plat.gpio_rdy)) { - ret = devm_gpio_request(&dev->dev, gpiomtd->plat.gpio_rdy, + ret = devm_gpio_request(&pdev->dev, gpiomtd->plat.gpio_rdy, "NAND RDY"); if (ret) return ret; gpio_direction_input(gpiomtd->plat.gpio_rdy); - this->dev_ready = gpio_nand_devready; + chip->dev_ready = gpio_nand_devready; } - this->IO_ADDR_W = this->IO_ADDR_R; - this->ecc.mode = NAND_ECC_SOFT; - this->options = gpiomtd->plat.options; - this->chip_delay = gpiomtd->plat.chip_delay; - this->cmd_ctrl = gpio_nand_cmd_ctrl; + chip->IO_ADDR_W = chip->IO_ADDR_R; + chip->ecc.mode = NAND_ECC_SOFT; + chip->options = gpiomtd->plat.options; + chip->chip_delay = gpiomtd->plat.chip_delay; + chip->cmd_ctrl = gpio_nand_cmd_ctrl; - gpiomtd->mtd_info.priv = this; - gpiomtd->mtd_info.owner = THIS_MODULE; + gpiomtd->mtd_info.priv = chip; + gpiomtd->mtd_info.owner = THIS_MODULE; - platform_set_drvdata(dev, gpiomtd); + platform_set_drvdata(pdev, gpiomtd); if (gpio_is_valid(gpiomtd->plat.gpio_nwp)) gpio_direction_output(gpiomtd->plat.gpio_nwp, 1); @@ -288,7 +288,7 @@ static int gpio_nand_probe(struct platform_device *dev) gpiomtd->plat.adjust_parts(&gpiomtd->plat, gpiomtd->mtd_info.size); - ppdata.of_node = dev->dev.of_node; + ppdata.of_node = pdev->dev.of_node; ret = mtd_device_parse_register(&gpiomtd->mtd_info, NULL, &ppdata, gpiomtd->plat.parts, gpiomtd->plat.num_parts);