Patchwork [v2,4/4] Add qtest support for i.MX I2C device emulation.

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Submitter Jean-Christophe DUBOIS
Date May 4, 2013, 2:09 p.m.
Message ID <e4904950b6cfb64d42a2af694caef301024fb07d.1367676178.git.jcd@tribudubois.net>
Download mbox | patch
Permalink /patch/241465/
State New
Headers show

Comments

Jean-Christophe DUBOIS - May 4, 2013, 2:09 p.m.
This is using a ds1338 RTC chip on the i2c bus. This RTC
chip is nop present on the real board

Signed-off-by: Jean-Christophe DUBOIS <jcd@tribudubois.net>
---
 tests/Makefile         |   3 +
 tests/ds1338-test.c    |  64 ++++++++++++++
 tests/libqos/i2c-imx.c | 224 +++++++++++++++++++++++++++++++++++++++++++++++++
 tests/libqos/i2c.h     |   3 +
 4 files changed, 294 insertions(+)
 create mode 100644 tests/ds1338-test.c
 create mode 100644 tests/libqos/i2c-imx.c
Andreas Färber - May 4, 2013, 4:53 p.m.
Am 04.05.2013 16:09, schrieb Jean-Christophe DUBOIS:
> This is using a ds1338 RTC chip on the i2c bus. This RTC
> chip is nop present on the real board
> 
> Signed-off-by: Jean-Christophe DUBOIS <jcd@tribudubois.net>
> ---
>  tests/Makefile         |   3 +
>  tests/ds1338-test.c    |  64 ++++++++++++++
>  tests/libqos/i2c-imx.c | 224 +++++++++++++++++++++++++++++++++++++++++++++++++
>  tests/libqos/i2c.h     |   3 +
>  4 files changed, 294 insertions(+)
>  create mode 100644 tests/ds1338-test.c
>  create mode 100644 tests/libqos/i2c-imx.c
[...]

The qtest itself looks fine, thanks.

> diff --git a/tests/libqos/i2c-imx.c b/tests/libqos/i2c-imx.c
> new file mode 100644
> index 0000000..da7316f
> --- /dev/null
> +++ b/tests/libqos/i2c-imx.c
> @@ -0,0 +1,224 @@
> +/*
> + * QTest i.MX I2C driver
> + *
> + * Copyright (c) 2013 Jean-Christophe Dubois
> + *
> + * This work is licensed under the terms of the GNU GPL, version 2 or later.
> + * See the COPYING file in the top-level directory.
> + */
> +#include "libqos/i2c.h"
> +
> +#include <glib.h>
> +#include <string.h>
> +
> +#include "qemu/osdep.h"

> +#include "qemu/bswap.h"

Is this one needed?

> +#include "libqtest.h"
> +

> +enum IMXI2CRegisters {
> +    IMX_I2C_IADR = 0x00,
> +    IMX_I2C_IFDR = 0x04,
> +    IMX_I2C_I2CR = 0x08,
> +    IMX_I2C_I2SR = 0x0c,
> +    IMX_I2C_I2DR = 0x10,
> +};
> +
> +enum IMXI2CCRBits {
> +    IMX_I2C_I2CR_IEN  = 1 << 7,
> +    IMX_I2C_I2CR_IIEN = 1 << 6,
> +    IMX_I2C_I2CR_MSTA = 1 << 5,
> +    IMX_I2C_I2CR_MTX  = 1 << 4,
> +    IMX_I2C_I2CR_TXAK = 1 << 3,
> +    IMX_I2C_I2CR_RSTA = 1 << 2,
> +};
> +
> +enum IMXI2CSRBits {
> +    IMX_I2C_I2SR_ICF  = 1 << 7,
> +    IMX_I2C_I2SR_IAAF = 1 << 6,
> +    IMX_I2C_I2SR_IBB  = 1 << 5,
> +    IMX_I2C_I2SR_IAL  = 1 << 4,
> +    IMX_I2C_I2SR_SRW  = 1 << 2,
> +    IMX_I2C_I2SR_IIF  = 1 << 1,
> +    IMX_I2C_I2SR_RXAK = 1 << 0,
> +};
> +
> +enum IMXI2CDirection {
> +    IMX_I2C_READ,
> +    IMX_I2C_WRITE,
> +};

libqos/i2c-omap.c was a driver for an unmaintained legacy device.
i.MX I2C however is being added by you in 2/4, so it would be better to
put these constants in a header in 2/4 for reuse here (i2c/imx_regs.h?).

Otherwise looking fine!

Regards,
Andreas

> +
> +typedef struct IMXI2C {
> +    I2CAdapter parent;
> +
> +    uint64_t addr;
> +} IMXI2C;
> +
> +
> +static void imx_i2c_set_slave_addr(IMXI2C *s, uint8_t addr,
> +                                   enum IMXI2CDirection direction)
> +{
> +    writeb(s->addr + IMX_I2C_I2DR, (addr << 1) |
> +           (direction == IMX_I2C_READ ? 1 : 0));
> +}
> +
> +static void imx_i2c_send(I2CAdapter *i2c, uint8_t addr,
> +                         const uint8_t *buf, uint16_t len)
> +{
> +    IMXI2C *s = (IMXI2C *)i2c;
> +    uint8_t data;
> +    uint8_t status;
> +    uint16_t size = 0;
> +
> +    if (!len) {
> +        return;
> +    }
> +
> +    /* set the bus for write */
> +    data = IMX_I2C_I2CR_IEN |
> +           IMX_I2C_I2CR_IIEN |
> +           IMX_I2C_I2CR_MSTA |
> +           IMX_I2C_I2CR_MTX |
> +           IMX_I2C_I2CR_TXAK;
> +
> +    writeb(s->addr + IMX_I2C_I2CR, data);
> +    status = readb(s->addr + IMX_I2C_I2SR);
> +    g_assert((status & IMX_I2C_I2SR_IBB) != 0);
> +
> +    /* set the slave address */
> +    imx_i2c_set_slave_addr(s, addr, IMX_I2C_WRITE);
> +    status = readb(s->addr + IMX_I2C_I2SR);
> +    g_assert((status & IMX_I2C_I2SR_IIF) != 0);
> +    g_assert((status & IMX_I2C_I2SR_RXAK) == 0);
> +
> +    /* ack the interrupt */
> +    writeb(s->addr + IMX_I2C_I2SR, 0);
> +    status = readb(s->addr + IMX_I2C_I2SR);
> +    g_assert((status & IMX_I2C_I2SR_IIF) == 0);
> +
> +    while (size < len) {
> +        /* check we are still busy */
> +        status = readb(s->addr + IMX_I2C_I2SR);
> +        g_assert((status & IMX_I2C_I2SR_IBB) != 0);
> +
> +        /* write the data */
> +        writeb(s->addr + IMX_I2C_I2DR, buf[size]);
> +        status = readb(s->addr + IMX_I2C_I2SR);
> +        g_assert((status & IMX_I2C_I2SR_IIF) != 0);
> +        g_assert((status & IMX_I2C_I2SR_RXAK) == 0);
> +
> +        /* ack the interrupt */
> +        writeb(s->addr + IMX_I2C_I2SR, 0);
> +        status = readb(s->addr + IMX_I2C_I2SR);
> +        g_assert((status & IMX_I2C_I2SR_IIF) == 0);
> +
> +        size++;
> +    }
> +
> +    /* release the bus */
> +    data &= ~(IMX_I2C_I2CR_MSTA | IMX_I2C_I2CR_MTX);
> +    writeb(s->addr + IMX_I2C_I2CR, data);
> +    status = readb(s->addr + IMX_I2C_I2SR);
> +    g_assert((status & IMX_I2C_I2SR_IBB) == 0);
> +}
> +
> +static void imx_i2c_recv(I2CAdapter *i2c, uint8_t addr,
> +                         uint8_t *buf, uint16_t len)
> +{
> +    IMXI2C *s = (IMXI2C *)i2c;
> +    uint8_t data;
> +    uint8_t status;
> +    uint16_t size = 0;
> +
> +    if (!len) {
> +        return;
> +    }
> +
> +    /* set the bus for write */
> +    data = IMX_I2C_I2CR_IEN |
> +           IMX_I2C_I2CR_IIEN |
> +           IMX_I2C_I2CR_MSTA |
> +           IMX_I2C_I2CR_MTX |
> +           IMX_I2C_I2CR_TXAK;
> +
> +    writeb(s->addr + IMX_I2C_I2CR, data);
> +    status = readb(s->addr + IMX_I2C_I2SR);
> +    g_assert((status & IMX_I2C_I2SR_IBB) != 0);
> +
> +    /* set the slave address */
> +    imx_i2c_set_slave_addr(s, addr, IMX_I2C_READ);
> +    status = readb(s->addr + IMX_I2C_I2SR);
> +    g_assert((status & IMX_I2C_I2SR_IIF) != 0);
> +    g_assert((status & IMX_I2C_I2SR_RXAK) == 0);
> +
> +    /* ack the interrupt */
> +    writeb(s->addr + IMX_I2C_I2SR, 0);
> +    status = readb(s->addr + IMX_I2C_I2SR);
> +    g_assert((status & IMX_I2C_I2SR_IIF) == 0);
> +
> +    /* set the bus for read */
> +    data &= ~IMX_I2C_I2CR_MTX;
> +    /* if only one byte don't ack */
> +    if (len != 1) {
> +        data &= ~IMX_I2C_I2CR_TXAK;
> +    }
> +    writeb(s->addr + IMX_I2C_I2CR, data);
> +    status = readb(s->addr + IMX_I2C_I2SR);
> +    g_assert((status & IMX_I2C_I2SR_IBB) != 0);
> +
> +    /* dummy read */
> +    readb(s->addr + IMX_I2C_I2DR);
> +    status = readb(s->addr + IMX_I2C_I2SR);
> +    g_assert((status & IMX_I2C_I2SR_IIF) != 0);
> +
> +    /* ack the interrupt */
> +    writeb(s->addr + IMX_I2C_I2SR, 0);
> +    status = readb(s->addr + IMX_I2C_I2SR);
> +    g_assert((status & IMX_I2C_I2SR_IIF) == 0);
> +
> +    while (size < len) {
> +        /* check we are still busy */
> +        status = readb(s->addr + IMX_I2C_I2SR);
> +        g_assert((status & IMX_I2C_I2SR_IBB) != 0);
> +
> +        if (size == (len - 1)) {
> +            /* stop the read transaction */
> +            data &= ~(IMX_I2C_I2CR_MSTA | IMX_I2C_I2CR_MTX);
> +        } else {
> +            /* ack the data read */
> +            data |= IMX_I2C_I2CR_TXAK;
> +        }
> +        writeb(s->addr + IMX_I2C_I2CR, data);
> +
> +        /* read the data */
> +        buf[size] = readb(s->addr + IMX_I2C_I2DR);
> +
> +        if (size != (len - 1)) {
> +            status = readb(s->addr + IMX_I2C_I2SR);
> +            g_assert((status & IMX_I2C_I2SR_IIF) != 0);
> +
> +            /* ack the interrupt */
> +            writeb(s->addr + IMX_I2C_I2SR, 0);
> +        }
> +
> +        status = readb(s->addr + IMX_I2C_I2SR);
> +        g_assert((status & IMX_I2C_I2SR_IIF) == 0);
> +
> +        size++;
> +    }
> +
> +    status = readb(s->addr + IMX_I2C_I2SR);
> +    g_assert((status & IMX_I2C_I2SR_IBB) == 0);
> +}
> +
> +I2CAdapter *imx_i2c_create(uint64_t addr)
> +{
> +    IMXI2C *s = g_malloc0(sizeof(*s));
> +    I2CAdapter *i2c = (I2CAdapter *)s;
> +
> +    s->addr = addr;
> +
> +    i2c->send = imx_i2c_send;
> +    i2c->recv = imx_i2c_recv;
> +
> +    return i2c;
> +}
> diff --git a/tests/libqos/i2c.h b/tests/libqos/i2c.h
> index 1ce9af4..c21f1dc 100644
> --- a/tests/libqos/i2c.h
> +++ b/tests/libqos/i2c.h
> @@ -27,4 +27,7 @@ void i2c_recv(I2CAdapter *i2c, uint8_t addr,
>  /* libi2c-omap.c */
>  I2CAdapter *omap_i2c_create(uint64_t addr);
>  
> +/* libi2c-imx.c */
> +I2CAdapter *imx_i2c_create(uint64_t addr);
> +
>  #endif
>
Jean-Christophe DUBOIS - May 4, 2013, 7:02 p.m.
On 05/04/2013 06:53 PM, Andreas Färber wrote:
> Am 04.05.2013 16:09, schrieb Jean-Christophe DUBOIS:
>
>> +#include "qemu/bswap.h"
> Is this one needed?

No, I will remove it.

>> +enum IMXI2CRegisters {
>> +    IMX_I2C_IADR = 0x00,
>> +    IMX_I2C_IFDR = 0x04,
>> +    IMX_I2C_I2CR = 0x08,
>> +    IMX_I2C_I2SR = 0x0c,
>> +    IMX_I2C_I2DR = 0x10,
>> +};
>> +
>> +enum IMXI2CCRBits {
>> +    IMX_I2C_I2CR_IEN  = 1 << 7,
>> +    IMX_I2C_I2CR_IIEN = 1 << 6,
>> +    IMX_I2C_I2CR_MSTA = 1 << 5,
>> +    IMX_I2C_I2CR_MTX  = 1 << 4,
>> +    IMX_I2C_I2CR_TXAK = 1 << 3,
>> +    IMX_I2C_I2CR_RSTA = 1 << 2,
>> +};
>> +
>> +enum IMXI2CSRBits {
>> +    IMX_I2C_I2SR_ICF  = 1 << 7,
>> +    IMX_I2C_I2SR_IAAF = 1 << 6,
>> +    IMX_I2C_I2SR_IBB  = 1 << 5,
>> +    IMX_I2C_I2SR_IAL  = 1 << 4,
>> +    IMX_I2C_I2SR_SRW  = 1 << 2,
>> +    IMX_I2C_I2SR_IIF  = 1 << 1,
>> +    IMX_I2C_I2SR_RXAK = 1 << 0,
>> +};
>> +
>> +enum IMXI2CDirection {
>> +    IMX_I2C_READ,
>> +    IMX_I2C_WRITE,
>> +};
> libqos/i2c-omap.c was a driver for an unmaintained legacy device.
> i.MX I2C however is being added by you in 2/4, so it would be better to
> put these constants in a header in 2/4 for reuse here (i2c/imx_regs.h?).
>
> Otherwise looking fine!

Will do in next version.

Meanwhile, other comments on the series are welcome.

JC

>
> Regards,
> Andreas
>
Peter Cheung - May 4, 2013, 7:48 p.m.
compile the latest source in mac error
/Users/peter/q/qemu>make installinstall -d -m 0755 "/Users/peter/qemu/share/doc/qemu"install -c -m 0644 qemu-doc.html  qemu-tech.html "/Users/peter/qemu/share/doc/qemu"install -c -m 0644 QMP/qmp-commands.txt "/Users/peter/qemu/share/doc/qemu"install -d -m 0755 "/Users/peter/qemu/share/man/man1"install -c -m 0644 qemu.1 qemu-img.1 "/Users/peter/qemu/share/man/man1"install -d -m 0755 "/Users/peter/qemu/share/man/man8"install -c -m 0644 qemu-nbd.8 "/Users/peter/qemu/share/man/man8"install -d -m 0755 "/Users/peter/qemu/share/qemu"install -d -m 0755 "/Users/peter/qemu/etc/qemu"install -c -m 0644 /Users/peter/q/qemu/sysconfigs/target/target-x86_64.conf "/Users/peter/qemu/etc/qemu"install -d -m 0755 "/Users/peter/qemu/bin"libtool --quiet --mode=install install -c -m 0755  qemu-ga qemu-nbd qemu-img qemu-io  "/Users/peter/qemu/bin"libtool: unknown option character `-' in: --quietUsage: libtool -static [-] file [...] [-filelist listfile[,dirname]] [-arch_only arch] [-sacLT]Usage: libtool -dynamic [-] file [...] [-filelist listfile[,dirname]] [-arch_only arch] [-o output] [-install_name name] [-compatibility_version #] [-current_version #] [-seg1addr 0x#] [-segs_read_only_addr 0x#] [-segs_read_write_addr 0x#] [-seg_addr_table <filename>] [-seg_addr_table_filename <file_system_path>] [-all_load] [-noall_load]make: *** [install] Error 1
Peter Maydell - May 4, 2013, 8:51 p.m.
On 4 May 2013 20:48, Peter Cheung <mcheung63@hotmail.com> wrote:
> compile the latest source in mac error
>
> /Users/peter/q/qemu>make install
> install -d -m 0755 "/Users/peter/qemu/share/doc/qemu"
> install -c -m 0644 qemu-doc.html  qemu-tech.html
> "/Users/peter/qemu/share/doc/qemu"
> install -c -m 0644 QMP/qmp-commands.txt "/Users/peter/qemu/share/doc/qemu"
> install -d -m 0755 "/Users/peter/qemu/share/man/man1"
> install -c -m 0644 qemu.1 qemu-img.1 "/Users/peter/qemu/share/man/man1"
> install -d -m 0755 "/Users/peter/qemu/share/man/man8"
> install -c -m 0644 qemu-nbd.8 "/Users/peter/qemu/share/man/man8"
> install -d -m 0755 "/Users/peter/qemu/share/qemu"
> install -d -m 0755 "/Users/peter/qemu/etc/qemu"
> install -c -m 0644 /Users/peter/q/qemu/sysconfigs/target/target-x86_64.conf
> "/Users/peter/qemu/etc/qemu"
> install -d -m 0755 "/Users/peter/qemu/bin"
> libtool --quiet --mode=install install -c -m 0755  qemu-ga qemu-nbd qemu-img
> qemu-io  "/Users/peter/qemu/bin"
> libtool: unknown option character `-' in: --quiet
> Usage: libtool -static [-] file [...] [-filelist listfile[,dirname]]
> [-arch_only arch] [-sacLT]
> Usage: libtool -dynamic [-] file [...] [-filelist listfile[,dirname]]
> [-arch_only arch] [-o output] [-install_name name] [-compatibility_version
> #] [-current_version #] [-seg1addr 0x#] [-segs_read_only_addr 0x#]
> [-segs_read_write_addr 0x#] [-seg_addr_table <filename>]
> [-seg_addr_table_filename <file_system_path>] [-all_load] [-noall_load]
> make: *** [install] Error 1

Yep, I can reproduce this. I'd never actually tried to do a
"make install" before :-)

I think the simplest way to fix this is just to improve our configure
test so that it does a basic check that 'libtool' is GNU libtool; the
fallback code for "we don't have libtool" will then work fine.

thanks
-- PMM

Patch

diff --git a/tests/Makefile b/tests/Makefile
index bf41d10..5f7a0e0 100644
--- a/tests/Makefile
+++ b/tests/Makefile
@@ -64,6 +64,7 @@  gcov-files-x86_64-y = $(subst i386-softmmu/,x86_64-softmmu/,$(gcov-files-i386-y)
 gcov-files-sparc-y += hw/m48t59.c
 gcov-files-sparc64-y += hw/m48t59.c
 check-qtest-arm-y = tests/tmp105-test$(EXESUF)
+check-qtest-arm-y += tests/ds1338-test$(EXESUF)
 gcov-files-arm-y += hw/tmp105.c
 
 GENERATED_HEADERS += tests/test-qapi-types.h tests/test-qapi-visit.h tests/test-qmp-commands.h
@@ -123,12 +124,14 @@  libqos-obj-y += tests/libqos/i2c.o
 libqos-pc-obj-y = $(libqos-obj-y) tests/libqos/pci-pc.o tests/libqos/fw_cfg-pc.o
 libqos-pc-obj-y += tests/libqos/malloc-pc.o
 libqos-omap-obj-y = $(libqos-obj-y) tests/libqos/i2c-omap.o
+libqos-imx-obj-y = $(libqos-obj-y) tests/libqos/i2c-imx.o
 
 tests/rtc-test$(EXESUF): tests/rtc-test.o
 tests/m48t59-test$(EXESUF): tests/m48t59-test.o
 tests/fdc-test$(EXESUF): tests/fdc-test.o
 tests/hd-geo-test$(EXESUF): tests/hd-geo-test.o
 tests/tmp105-test$(EXESUF): tests/tmp105-test.o $(libqos-omap-obj-y)
+tests/ds1338-test$(EXESUF): tests/ds1338-test.o $(libqos-imx-obj-y)
 tests/i440fx-test$(EXESUF): tests/i440fx-test.o $(libqos-pc-obj-y)
 tests/fw_cfg-test$(EXESUF): tests/fw_cfg-test.o $(libqos-pc-obj-y)
 
diff --git a/tests/ds1338-test.c b/tests/ds1338-test.c
new file mode 100644
index 0000000..3e3fa0b
--- /dev/null
+++ b/tests/ds1338-test.c
@@ -0,0 +1,64 @@ 
+/*
+ * QTest testcase for the DS1338 RTC
+ *
+ * Copyright (c) 2013 Jean-Christophe Dubois
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2 or later.
+ * See the COPYING file in the top-level directory.
+ */
+#include "libqtest.h"
+#include "libqos/i2c.h"
+
+#include <glib.h>
+
+#define IMX25_I2C_0_BASE 0x43F80000
+
+#define DS1338_ADDR 0x68
+
+static I2CAdapter *i2c;
+static uint8_t addr;
+
+#define bcd2bin(x)        (((x) & 0x0f) + ((x) >> 4) * 10)
+
+static void send_and_receive(void)
+{
+    uint8_t cmd[1];
+    uint8_t resp[7];
+    time_t now = time(NULL);
+    struct tm *tm_ptr = localtime(&now);
+
+    /* reset the index in the RTC memory */
+    cmd[0] = 0;
+    i2c_send(i2c, addr, cmd, 1);
+
+    /* retrieve the date */
+    i2c_recv(i2c, addr, resp, 7);
+
+    /* check retreived time againt local time */
+    g_assert_cmpuint(bcd2bin(resp[4]), == , tm_ptr->tm_mday);
+    g_assert_cmpuint(bcd2bin(resp[5]), == , 1 + tm_ptr->tm_mon);
+    g_assert_cmpuint(2000 + bcd2bin(resp[6]), == , 1900 + tm_ptr->tm_year);
+}
+
+int main(int argc, char **argv)
+{
+    QTestState *s = NULL;
+    int ret;
+
+    g_test_init(&argc, &argv, NULL);
+
+    s = qtest_start("-display none -machine imx25_3ds");
+    i2c = imx_i2c_create(IMX25_I2C_0_BASE);
+    addr = DS1338_ADDR;
+
+    qtest_add_func("/ds1338/tx-rx", send_and_receive);
+
+    ret = g_test_run();
+
+    if (s) {
+        qtest_quit(s);
+    }
+    g_free(i2c);
+
+    return ret;
+}
diff --git a/tests/libqos/i2c-imx.c b/tests/libqos/i2c-imx.c
new file mode 100644
index 0000000..da7316f
--- /dev/null
+++ b/tests/libqos/i2c-imx.c
@@ -0,0 +1,224 @@ 
+/*
+ * QTest i.MX I2C driver
+ *
+ * Copyright (c) 2013 Jean-Christophe Dubois
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2 or later.
+ * See the COPYING file in the top-level directory.
+ */
+#include "libqos/i2c.h"
+
+#include <glib.h>
+#include <string.h>
+
+#include "qemu/osdep.h"
+#include "qemu/bswap.h"
+#include "libqtest.h"
+
+enum IMXI2CRegisters {
+    IMX_I2C_IADR = 0x00,
+    IMX_I2C_IFDR = 0x04,
+    IMX_I2C_I2CR = 0x08,
+    IMX_I2C_I2SR = 0x0c,
+    IMX_I2C_I2DR = 0x10,
+};
+
+enum IMXI2CCRBits {
+    IMX_I2C_I2CR_IEN  = 1 << 7,
+    IMX_I2C_I2CR_IIEN = 1 << 6,
+    IMX_I2C_I2CR_MSTA = 1 << 5,
+    IMX_I2C_I2CR_MTX  = 1 << 4,
+    IMX_I2C_I2CR_TXAK = 1 << 3,
+    IMX_I2C_I2CR_RSTA = 1 << 2,
+};
+
+enum IMXI2CSRBits {
+    IMX_I2C_I2SR_ICF  = 1 << 7,
+    IMX_I2C_I2SR_IAAF = 1 << 6,
+    IMX_I2C_I2SR_IBB  = 1 << 5,
+    IMX_I2C_I2SR_IAL  = 1 << 4,
+    IMX_I2C_I2SR_SRW  = 1 << 2,
+    IMX_I2C_I2SR_IIF  = 1 << 1,
+    IMX_I2C_I2SR_RXAK = 1 << 0,
+};
+
+enum IMXI2CDirection {
+    IMX_I2C_READ,
+    IMX_I2C_WRITE,
+};
+
+typedef struct IMXI2C {
+    I2CAdapter parent;
+
+    uint64_t addr;
+} IMXI2C;
+
+
+static void imx_i2c_set_slave_addr(IMXI2C *s, uint8_t addr,
+                                   enum IMXI2CDirection direction)
+{
+    writeb(s->addr + IMX_I2C_I2DR, (addr << 1) |
+           (direction == IMX_I2C_READ ? 1 : 0));
+}
+
+static void imx_i2c_send(I2CAdapter *i2c, uint8_t addr,
+                         const uint8_t *buf, uint16_t len)
+{
+    IMXI2C *s = (IMXI2C *)i2c;
+    uint8_t data;
+    uint8_t status;
+    uint16_t size = 0;
+
+    if (!len) {
+        return;
+    }
+
+    /* set the bus for write */
+    data = IMX_I2C_I2CR_IEN |
+           IMX_I2C_I2CR_IIEN |
+           IMX_I2C_I2CR_MSTA |
+           IMX_I2C_I2CR_MTX |
+           IMX_I2C_I2CR_TXAK;
+
+    writeb(s->addr + IMX_I2C_I2CR, data);
+    status = readb(s->addr + IMX_I2C_I2SR);
+    g_assert((status & IMX_I2C_I2SR_IBB) != 0);
+
+    /* set the slave address */
+    imx_i2c_set_slave_addr(s, addr, IMX_I2C_WRITE);
+    status = readb(s->addr + IMX_I2C_I2SR);
+    g_assert((status & IMX_I2C_I2SR_IIF) != 0);
+    g_assert((status & IMX_I2C_I2SR_RXAK) == 0);
+
+    /* ack the interrupt */
+    writeb(s->addr + IMX_I2C_I2SR, 0);
+    status = readb(s->addr + IMX_I2C_I2SR);
+    g_assert((status & IMX_I2C_I2SR_IIF) == 0);
+
+    while (size < len) {
+        /* check we are still busy */
+        status = readb(s->addr + IMX_I2C_I2SR);
+        g_assert((status & IMX_I2C_I2SR_IBB) != 0);
+
+        /* write the data */
+        writeb(s->addr + IMX_I2C_I2DR, buf[size]);
+        status = readb(s->addr + IMX_I2C_I2SR);
+        g_assert((status & IMX_I2C_I2SR_IIF) != 0);
+        g_assert((status & IMX_I2C_I2SR_RXAK) == 0);
+
+        /* ack the interrupt */
+        writeb(s->addr + IMX_I2C_I2SR, 0);
+        status = readb(s->addr + IMX_I2C_I2SR);
+        g_assert((status & IMX_I2C_I2SR_IIF) == 0);
+
+        size++;
+    }
+
+    /* release the bus */
+    data &= ~(IMX_I2C_I2CR_MSTA | IMX_I2C_I2CR_MTX);
+    writeb(s->addr + IMX_I2C_I2CR, data);
+    status = readb(s->addr + IMX_I2C_I2SR);
+    g_assert((status & IMX_I2C_I2SR_IBB) == 0);
+}
+
+static void imx_i2c_recv(I2CAdapter *i2c, uint8_t addr,
+                         uint8_t *buf, uint16_t len)
+{
+    IMXI2C *s = (IMXI2C *)i2c;
+    uint8_t data;
+    uint8_t status;
+    uint16_t size = 0;
+
+    if (!len) {
+        return;
+    }
+
+    /* set the bus for write */
+    data = IMX_I2C_I2CR_IEN |
+           IMX_I2C_I2CR_IIEN |
+           IMX_I2C_I2CR_MSTA |
+           IMX_I2C_I2CR_MTX |
+           IMX_I2C_I2CR_TXAK;
+
+    writeb(s->addr + IMX_I2C_I2CR, data);
+    status = readb(s->addr + IMX_I2C_I2SR);
+    g_assert((status & IMX_I2C_I2SR_IBB) != 0);
+
+    /* set the slave address */
+    imx_i2c_set_slave_addr(s, addr, IMX_I2C_READ);
+    status = readb(s->addr + IMX_I2C_I2SR);
+    g_assert((status & IMX_I2C_I2SR_IIF) != 0);
+    g_assert((status & IMX_I2C_I2SR_RXAK) == 0);
+
+    /* ack the interrupt */
+    writeb(s->addr + IMX_I2C_I2SR, 0);
+    status = readb(s->addr + IMX_I2C_I2SR);
+    g_assert((status & IMX_I2C_I2SR_IIF) == 0);
+
+    /* set the bus for read */
+    data &= ~IMX_I2C_I2CR_MTX;
+    /* if only one byte don't ack */
+    if (len != 1) {
+        data &= ~IMX_I2C_I2CR_TXAK;
+    }
+    writeb(s->addr + IMX_I2C_I2CR, data);
+    status = readb(s->addr + IMX_I2C_I2SR);
+    g_assert((status & IMX_I2C_I2SR_IBB) != 0);
+
+    /* dummy read */
+    readb(s->addr + IMX_I2C_I2DR);
+    status = readb(s->addr + IMX_I2C_I2SR);
+    g_assert((status & IMX_I2C_I2SR_IIF) != 0);
+
+    /* ack the interrupt */
+    writeb(s->addr + IMX_I2C_I2SR, 0);
+    status = readb(s->addr + IMX_I2C_I2SR);
+    g_assert((status & IMX_I2C_I2SR_IIF) == 0);
+
+    while (size < len) {
+        /* check we are still busy */
+        status = readb(s->addr + IMX_I2C_I2SR);
+        g_assert((status & IMX_I2C_I2SR_IBB) != 0);
+
+        if (size == (len - 1)) {
+            /* stop the read transaction */
+            data &= ~(IMX_I2C_I2CR_MSTA | IMX_I2C_I2CR_MTX);
+        } else {
+            /* ack the data read */
+            data |= IMX_I2C_I2CR_TXAK;
+        }
+        writeb(s->addr + IMX_I2C_I2CR, data);
+
+        /* read the data */
+        buf[size] = readb(s->addr + IMX_I2C_I2DR);
+
+        if (size != (len - 1)) {
+            status = readb(s->addr + IMX_I2C_I2SR);
+            g_assert((status & IMX_I2C_I2SR_IIF) != 0);
+
+            /* ack the interrupt */
+            writeb(s->addr + IMX_I2C_I2SR, 0);
+        }
+
+        status = readb(s->addr + IMX_I2C_I2SR);
+        g_assert((status & IMX_I2C_I2SR_IIF) == 0);
+
+        size++;
+    }
+
+    status = readb(s->addr + IMX_I2C_I2SR);
+    g_assert((status & IMX_I2C_I2SR_IBB) == 0);
+}
+
+I2CAdapter *imx_i2c_create(uint64_t addr)
+{
+    IMXI2C *s = g_malloc0(sizeof(*s));
+    I2CAdapter *i2c = (I2CAdapter *)s;
+
+    s->addr = addr;
+
+    i2c->send = imx_i2c_send;
+    i2c->recv = imx_i2c_recv;
+
+    return i2c;
+}
diff --git a/tests/libqos/i2c.h b/tests/libqos/i2c.h
index 1ce9af4..c21f1dc 100644
--- a/tests/libqos/i2c.h
+++ b/tests/libqos/i2c.h
@@ -27,4 +27,7 @@  void i2c_recv(I2CAdapter *i2c, uint8_t addr,
 /* libi2c-omap.c */
 I2CAdapter *omap_i2c_create(uint64_t addr);
 
+/* libi2c-imx.c */
+I2CAdapter *imx_i2c_create(uint64_t addr);
+
 #endif