From patchwork Fri May 3 14:00:13 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fabio Estevam X-Patchwork-Id: 241319 X-Patchwork-Delegate: sbabic@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 1D16A2C00D8 for ; Sat, 4 May 2013 00:03:12 +1000 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 95F954A3AD; Fri, 3 May 2013 16:03:01 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 79UsCWeFgvg2; Fri, 3 May 2013 16:03:01 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 2970B4A3C5; Fri, 3 May 2013 16:02:29 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id D90304A30F for ; Fri, 3 May 2013 16:02:26 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id rFvkigzcR2JB for ; Fri, 3 May 2013 16:02:22 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-ve0-f172.google.com (mail-ve0-f172.google.com [209.85.128.172]) by theia.denx.de (Postfix) with ESMTPS id 1B0694A3BE for ; Fri, 3 May 2013 16:01:57 +0200 (CEST) Received: by mail-ve0-f172.google.com with SMTP id da11so1511767veb.17 for ; Fri, 03 May 2013 07:01:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=x-received:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references; bh=ejL441TP1uOfQULOkreL3QL1LyqnKVth+BvN6hC/rAw=; b=SERLL96zTrpyw7nnflXkJahtGOTeI1zY5Gx3UlPRcTZTqvvOWQc7bL+/OHDZsDcJSU Z1VYTKwvWbDW++DEOYDUJwS1qSx+ntvbGqEUBwLqI+SXxRhklKdxm0gX4RcwnDU/7QF6 n5rVegQKDuR3jaUuRpCji6QNnGsXcRQDIkqZsNKLGYFKew1AbRgP7wlOodF1BXXQsPd7 aoxDDL0WiJ0kQkxddkQAcfvEEhIQKWQ55NG+Wc+Ddoq/iyF+xKQBjTFCUDq3L84sFI/7 wR/zWkjtP1YxjIiIxmJBqGu1htDyUg8sN71wWyRvZHpCyHaPeQWKAmE8Cm1WPfzJLRq5 qspg== X-Received: by 10.220.106.74 with SMTP id w10mr3690178vco.11.1367589716138; Fri, 03 May 2013 07:01:56 -0700 (PDT) Received: from localhost.localdomain ([187.106.36.101]) by mx.google.com with ESMTPSA id q3sm8183852vdi.9.2013.05.03.07.01.53 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Fri, 03 May 2013 07:01:55 -0700 (PDT) From: Fabio Estevam To: sbabic@denx.de Date: Fri, 3 May 2013 11:00:13 -0300 Message-Id: <1367589613-18065-8-git-send-email-festevam@gmail.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1367589613-18065-1-git-send-email-festevam@gmail.com> References: <1367589613-18065-1-git-send-email-festevam@gmail.com> Cc: marex@denx.de, u-boot@lists.denx.de, Fabio Estevam , otavio@ossystems.com.br Subject: [U-Boot] [PATCH v4 7/7] mxs: spl_mem_init: Change EMI port priority X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de From: Fabio Estevam FSL bootlets code set the PORT_PRIORITY_ORDER field of register HW_EMI_CTRL as 0x2, which means: PORT0231 = 0x02 Priority Order: AXI0, AHB2, AHB3, AHB1 Signed-off-by: Fabio Estevam --- Changes since v3: - None Changes since v2: - None Changes since v1: - None arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c index e599f31..d932950 100644 --- a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c +++ b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c @@ -287,7 +287,7 @@ static void mx23_mem_init(void) early_delay(20000); /* Adjust EMI port priority. */ - clrsetbits_le32(0x80020000, 0x1f << 16, 0x8); + clrsetbits_le32(0x80020000, 0x1f << 16, 0x2); early_delay(20000); setbits_le32(MXS_DRAM_BASE + 0x40, 1 << 19);