From patchwork Fri May 3 14:00:07 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fabio Estevam X-Patchwork-Id: 241314 X-Patchwork-Delegate: sbabic@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 85CC72C00D3 for ; Sat, 4 May 2013 00:02:11 +1000 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 09C374A3D3; Fri, 3 May 2013 16:02:10 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id Eaprivh8eY1o; Fri, 3 May 2013 16:02:09 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id D57094A3BD; Fri, 3 May 2013 16:02:01 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 590984A3AB for ; Fri, 3 May 2013 16:01:55 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id Nq9hMos2eTeI for ; Fri, 3 May 2013 16:01:50 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-vb0-f47.google.com (mail-vb0-f47.google.com [209.85.212.47]) by theia.denx.de (Postfix) with ESMTPS id 466AE4A30F for ; Fri, 3 May 2013 16:01:43 +0200 (CEST) Received: by mail-vb0-f47.google.com with SMTP id x14so1377281vbb.34 for ; Fri, 03 May 2013 07:01:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=x-received:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references; bh=02zMUy9FwM0Laii0Xi1T79gYRHIRkFQ9gqphArpYTIU=; b=iqBcVgFp/Z2ZRvJ/JX3YMmFHnV+RI356Cz1sPm5JNrais5StaE7uLrtF1ZqdRhAVjQ njRppQUlckOSpo+E20/fLu+/f8cMxC7RgLmzWne/AfGPbbtBJ8NysEgvWdI3SsnDMaFk +j4S7e/f/+vOCy4bz84HQs85TO4GjDnv7WJbq0Z5e411GxVfyew0YEpFp9QBSoNWT1u6 1YgLGX1k3UhC5bI5fNCzSaWlPBFmjgqGm6GiUItJh8gZ+SilqSosWP2lKeMMmmo1wipA ZXhasiBZAyM8RK/iNCRTbfMDA1o9oztQgY1vWsJgUaochkJ/NsNWwiO3lk08XiHAampE 7GXA== X-Received: by 10.220.215.73 with SMTP id hd9mr3731880vcb.19.1367589702677; Fri, 03 May 2013 07:01:42 -0700 (PDT) Received: from localhost.localdomain ([187.106.36.101]) by mx.google.com with ESMTPSA id q3sm8183852vdi.9.2013.05.03.07.01.40 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Fri, 03 May 2013 07:01:42 -0700 (PDT) From: Fabio Estevam To: sbabic@denx.de Date: Fri, 3 May 2013 11:00:07 -0300 Message-Id: <1367589613-18065-2-git-send-email-festevam@gmail.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1367589613-18065-1-git-send-email-festevam@gmail.com> References: <1367589613-18065-1-git-send-email-festevam@gmail.com> Cc: marex@denx.de, u-boot@lists.denx.de, Fabio Estevam , otavio@ossystems.com.br Subject: [U-Boot] [PATCH v4 1/7] mx23: Fix pad voltage selection bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de From: Fabio Estevam On mx23 the pad voltage selection bit needs to be always '0', since '1' is a reserved value. For example: Pin 108, EMI_A06 pin voltage selection: 0= 1.8V (mDDR) or 2.5V (DDR1); 1= reserved. Fix the pad voltage definitions for the mx23 case. Signed-off-by: Fabio Estevam Acked-by: Marek Vasut --- Changes since v3: - Add Marek's ack Changes since v2: - Only place PAD_3V3 inside the if/else block Changes since v1: - Newly introduced arch/arm/include/asm/arch-mxs/iomux.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm/include/asm/arch-mxs/iomux.h b/arch/arm/include/asm/arch-mxs/iomux.h index 4288715..f46895e 100644 --- a/arch/arm/include/asm/arch-mxs/iomux.h +++ b/arch/arm/include/asm/arch-mxs/iomux.h @@ -71,7 +71,11 @@ typedef u32 iomux_cfg_t; #define PAD_16MA 3 #define PAD_1V8 0 +#if defined CONFIG_MX28 #define PAD_3V3 1 +#else +#define PAD_3V3 0 +#endif #define PAD_NOPULL 0 #define PAD_PULLUP 1