From patchwork Thu May 2 13:35:33 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 240992 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 2C0522C0097 for ; Thu, 2 May 2013 23:46:28 +1000 (EST) Received: from localhost ([::1]:34264 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UXtq6-00009W-Dw for incoming@patchwork.ozlabs.org; Thu, 02 May 2013 09:46:26 -0400 Received: from eggs.gnu.org ([208.118.235.92]:48844) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UXtgC-00030H-G5 for qemu-devel@nongnu.org; Thu, 02 May 2013 09:36:27 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1UXtg3-0004WR-OM for qemu-devel@nongnu.org; Thu, 02 May 2013 09:36:12 -0400 Received: from cantor2.suse.de ([195.135.220.15]:46613 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UXtg3-0004VV-FY for qemu-devel@nongnu.org; Thu, 02 May 2013 09:36:03 -0400 Received: from relay2.suse.de (unknown [195.135.220.254]) by mx2.suse.de (Postfix) with ESMTP id 341EDA5595; Thu, 2 May 2013 15:36:01 +0200 (CEST) From: =?UTF-8?q?Andreas=20F=C3=A4rber?= To: qemu-devel@nongnu.org Date: Thu, 2 May 2013 15:35:33 +0200 Message-Id: <1367501755-32272-8-git-send-email-afaerber@suse.de> X-Mailer: git-send-email 1.8.1.4 In-Reply-To: <1367501755-32272-1-git-send-email-afaerber@suse.de> References: <1367501755-32272-1-git-send-email-afaerber@suse.de> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.4.x X-Received-From: 195.135.220.15 Cc: Igor Mammedov , =?UTF-8?q?Andreas=20F=C3=A4rber?= Subject: [Qemu-devel] [PATCH 07/29] cpu: Introduce get_arch_id() method and override it for X86CPU X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Igor Mammedov get_arch_id() adds possibility for generic code to get a guest-visible CPU ID without accessing CPUArchState. If derived classes don't override it, it will return cpu_index. Override it on target-i386 in X86CPU to return the APIC ID. Signed-off-by: Igor Mammedov Reviewed-by: Eduardo Habkost Reviewed-by: liguang Acked-by: Michael S. Tsirkin Signed-off-by: Andreas Färber --- include/qom/cpu.h | 2 ++ qom/cpu.c | 6 ++++++ target-i386/cpu.c | 10 ++++++++++ 3 files changed, 18 insertions(+) diff --git a/include/qom/cpu.h b/include/qom/cpu.h index ac93dce..1b4de17 100644 --- a/include/qom/cpu.h +++ b/include/qom/cpu.h @@ -45,6 +45,7 @@ typedef struct CPUState CPUState; * instantiatable CPU type. * @reset: Callback to reset the #CPUState to its initial state. * @do_interrupt: Callback for interrupt handling. + * @get_arch_id: Callback for getting architecture-dependent CPU ID. * @vmsd: State description for migration. * * Represents a CPU family or model. @@ -58,6 +59,7 @@ typedef struct CPUClass { void (*reset)(CPUState *cpu); void (*do_interrupt)(CPUState *cpu); + int64_t (*get_arch_id)(CPUState *cpu); const struct VMStateDescription *vmsd; } CPUClass; diff --git a/qom/cpu.c b/qom/cpu.c index 34fa805..9a4457b 100644 --- a/qom/cpu.c +++ b/qom/cpu.c @@ -78,6 +78,11 @@ static void cpu_common_realizefn(DeviceState *dev, Error **errp) } } +static int64_t cpu_common_get_arch_id(CPUState *cpu) +{ + return cpu->cpu_index; +} + static void cpu_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); @@ -85,6 +90,7 @@ static void cpu_class_init(ObjectClass *klass, void *data) k->class_by_name = cpu_common_class_by_name; k->reset = cpu_common_reset; + k->get_arch_id = cpu_common_get_arch_id; dc->realize = cpu_common_realizefn; dc->no_user = 1; } diff --git a/target-i386/cpu.c b/target-i386/cpu.c index e2302d8..f34ba23 100644 --- a/target-i386/cpu.c +++ b/target-i386/cpu.c @@ -2272,6 +2272,14 @@ static void x86_cpu_initfn(Object *obj) } } +static int64_t x86_cpu_get_arch_id(CPUState *cs) +{ + X86CPU *cpu = X86_CPU(cs); + CPUX86State *env = &cpu->env; + + return env->cpuid_apic_id; +} + static void x86_cpu_common_class_init(ObjectClass *oc, void *data) { X86CPUClass *xcc = X86_CPU_CLASS(oc); @@ -2286,6 +2294,8 @@ static void x86_cpu_common_class_init(ObjectClass *oc, void *data) cc->do_interrupt = x86_cpu_do_interrupt; cpu_class_set_vmsd(cc, &vmstate_x86_cpu); + + cc->get_arch_id = x86_cpu_get_arch_id; } static const TypeInfo x86_cpu_type_info = {