Message ID | 1367444689-31301-4-git-send-email-festevam@gmail.com |
---|---|
State | Changes Requested |
Delegated to: | Stefano Babic |
Headers | show |
Dear Fabio Estevam, > From: Fabio Estevam <fabio.estevam@freescale.com> > > Registers HW_PINCTRL_DRIVE9, HW_PINCTRL_DRIVE10, HW_PINCTRL_DRIVE11, > HW_PINCTRL_DRIVE12, HW_PINCTRL_DRIVE13 and HW_PINCTRL_DRIVE14 control the > drive strength and the voltage selection for the DDR pins. > > The reset values of the voltage selection pins are '1', which is marked as > 'reserved' in the mx23 reference manual. > > Clear these bits for proper operation of DDR. > > Also change MUX_CONFIG_EMI, which results in better stability and match the > bootlets code from Freescale. > > Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Uh, should the pinctrl/iomux stuff not set these up properly? > --- > board/freescale/mx23evk/spl_boot.c | 12 +++++++++++- > 1 file changed, 11 insertions(+), 1 deletion(-) > > diff --git a/board/freescale/mx23evk/spl_boot.c > b/board/freescale/mx23evk/spl_boot.c index b6f4e7e..035a29c 100644 > --- a/board/freescale/mx23evk/spl_boot.c > +++ b/board/freescale/mx23evk/spl_boot.c > @@ -26,7 +26,7 @@ > #include <asm/arch/sys_proto.h> > > #define MUX_CONFIG_SSP1 (MXS_PAD_3V3 | MXS_PAD_8MA | MXS_PAD_PULLUP) > -#define MUX_CONFIG_EMI (MXS_PAD_3V3 | MXS_PAD_16MA | MXS_PAD_PULLUP) > +#define MUX_CONFIG_EMI MXS_PAD_12MA > > const iomux_cfg_t iomux_setup[] = { > /* DUART */ > @@ -110,5 +110,15 @@ void mxs_adjust_memory_params(uint32_t *dram_vals) > > void board_init_ll(void) > { > + struct mxs_pinctrl_regs *pinctrl = > + (struct mxs_pinctrl_regs *)MXS_PINCTRL_BASE; > + /* Clear the voltage bits for EMI pins as the reset value is invalid */ > + writel(0, &pinctrl->drive9); > + writel(0, &pinctrl->drive10); > + writel(0, &pinctrl->drive11); > + writel(0, &pinctrl->drive12); > + writel(0, &pinctrl->drive13); > + writel(0, &pinctrl->drive14); > + writel(0, &pinctrl->drive9); > mxs_common_spl_init(iomux_setup, ARRAY_SIZE(iomux_setup)); > } Best regards, Marek Vasut
On Wed, May 1, 2013 at 8:28 PM, Marek Vasut <marex@denx.de> wrote:
> Uh, should the pinctrl/iomux stuff not set these up properly?
This is mx23 and EMI pins specific, so I think it is OK to do it in
the board file.
Dear Fabio Estevam, > On Wed, May 1, 2013 at 8:28 PM, Marek Vasut <marex@denx.de> wrote: > > Uh, should the pinctrl/iomux stuff not set these up properly? > > This is mx23 and EMI pins specific, so I think it is OK to do it in > the board file. Yes, but should the iomux_setup[] configure that already? Best regards, Marek Vasut
diff --git a/board/freescale/mx23evk/spl_boot.c b/board/freescale/mx23evk/spl_boot.c index b6f4e7e..035a29c 100644 --- a/board/freescale/mx23evk/spl_boot.c +++ b/board/freescale/mx23evk/spl_boot.c @@ -26,7 +26,7 @@ #include <asm/arch/sys_proto.h> #define MUX_CONFIG_SSP1 (MXS_PAD_3V3 | MXS_PAD_8MA | MXS_PAD_PULLUP) -#define MUX_CONFIG_EMI (MXS_PAD_3V3 | MXS_PAD_16MA | MXS_PAD_PULLUP) +#define MUX_CONFIG_EMI MXS_PAD_12MA const iomux_cfg_t iomux_setup[] = { /* DUART */ @@ -110,5 +110,15 @@ void mxs_adjust_memory_params(uint32_t *dram_vals) void board_init_ll(void) { + struct mxs_pinctrl_regs *pinctrl = + (struct mxs_pinctrl_regs *)MXS_PINCTRL_BASE; + /* Clear the voltage bits for EMI pins as the reset value is invalid */ + writel(0, &pinctrl->drive9); + writel(0, &pinctrl->drive10); + writel(0, &pinctrl->drive11); + writel(0, &pinctrl->drive12); + writel(0, &pinctrl->drive13); + writel(0, &pinctrl->drive14); + writel(0, &pinctrl->drive9); mxs_common_spl_init(iomux_setup, ARRAY_SIZE(iomux_setup)); }