@@ -138,11 +138,11 @@ static s32 spi_cfg_mxc(struct mxc_spi_slave
*mxcs, unsigned int cs,
}
/*
- * Reset SPI and set all CSs to master mode, if toggling
- * between slave and master mode we might see a glitch
- * on the clock line
+ * Reset SPI and the CONREG, but keep the CSs which are already
+ * in master mode. If toggling between slave and master mode we might
+ * see a glitch on the clock line
*/
- reg_ctrl = MXC_CSPICTRL_MODE_MASK;
+ reg_ctrl = reg_read(®s->ctrl) & MXC_CSPICTRL_MODE_MASK;
reg_write(®s->ctrl, reg_ctrl);
reg_ctrl |= MXC_CSPICTRL_EN;