Patchwork [AArch64] Add testcases for FAC, FCM changes.

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Submitter James Greenhalgh
Date April 30, 2013, 3:15 p.m.
Message ID <1367334929-23176-1-git-send-email-james.greenhalgh@arm.com>
Download mbox | patch
Permalink /patch/240643/
State New
Headers show

Comments

James Greenhalgh - April 30, 2013, 3:15 p.m.
Hi,

This patch adds two testcases for the scalar and vector versions
of the vca* intrinsics.

New tests pass on aarch64-none-elf.

OK?

Thanks,
James

---
gcc/testsuite/

2013-04-30  James Greenhalgh  <james.greenhalgh@arm.com>

	* gcc.target/aarch64/scalar-vca.c: New.
	* gcc.target/aarch64/vect-vca.c: Likewise.
Marcus Shawcroft - April 30, 2013, 5:23 p.m.
OK
/Marcus

On 30 April 2013 16:15, James Greenhalgh <james.greenhalgh@arm.com> wrote:
>
> Hi,
>
> This patch adds two testcases for the scalar and vector versions
> of the vca* intrinsics.
>
> New tests pass on aarch64-none-elf.
>
> OK?
>
> Thanks,
> James
>
> ---
> gcc/testsuite/
>
> 2013-04-30  James Greenhalgh  <james.greenhalgh@arm.com>
>
>         * gcc.target/aarch64/scalar-vca.c: New.
>         * gcc.target/aarch64/vect-vca.c: Likewise.

Patch

diff --git a/gcc/testsuite/gcc.target/aarch64/scalar-vca.c b/gcc/testsuite/gcc.target/aarch64/scalar-vca.c
new file mode 100644
index 0000000..b118814
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/scalar-vca.c
@@ -0,0 +1,72 @@ 
+/* { dg-do run } */
+/* { dg-options "-O3 --save-temps" } */
+
+#include <arm_neon.h>
+
+extern void abort (void);
+extern float fabsf (float);
+extern double fabs (double);
+
+#define NUM_TESTS 8
+
+float input_s1[] = {0.1f, -0.1f, 0.4f, 10.3f, 200.0f, -800.0f, -13.0f, -0.5f};
+float input_s2[] = {-0.2f, 0.4f, 0.04f, -100.3f, 2.0f, -80.0f, 13.0f, -0.5f};
+double input_d1[] = {0.1, -0.1, 0.4, 10.3, 200.0, -800.0, -13.0, -0.5};
+double input_d2[] = {-0.2, 0.4, 0.04, -100.3, 2.0, -80.0, 13.0, -0.5};
+
+#define TEST(TEST, CMP, SUFFIX, WIDTH, F)				\
+int									\
+test_fca##TEST##SUFFIX##_float##WIDTH##_t (void)			\
+{									\
+  int ret = 0;								\
+  int i = 0;								\
+  uint##WIDTH##_t output[NUM_TESTS];					\
+									\
+  for (i = 0; i < NUM_TESTS; i++)					\
+    {									\
+      float##WIDTH##_t f1 = fabs##F (input_##SUFFIX##1[i]);		\
+      float##WIDTH##_t f2 = fabs##F (input_##SUFFIX##2[i]);		\
+      /* Inhibit optimization of our linear test loop.  */		\
+      asm volatile ("" : : : "memory");					\
+      output[i] = f1 CMP f2 ? -1 : 0;					\
+    }									\
+									\
+  for (i = 0; i < NUM_TESTS; i++)					\
+    {									\
+      output[i] = vca##TEST##SUFFIX##_f##WIDTH (input_##SUFFIX##1[i],	\
+						input_##SUFFIX##2[i])	\
+						  ^ output[i];		\
+      /* Inhibit autovectorization of our scalar test loop.  */		\
+      asm volatile ("" : : : "memory");					\
+    }									\
+									\
+  for (i = 0; i < NUM_TESTS; i++)					\
+    ret |= output[i];							\
+									\
+  return ret;								\
+}
+
+TEST (ge, >=, s, 32, f)
+/* { dg-final { scan-assembler "facge\\ts\[0-9\]+, s\[0-9\]+, s\[0-9\]+" } } */
+TEST (ge, >=, d, 64, )
+/* { dg-final { scan-assembler "facge\\td\[0-9\]+, d\[0-9\]+, d\[0-9\]+" } } */
+TEST (gt, >, s, 32, f)
+/* { dg-final { scan-assembler "facgt\\ts\[0-9\]+, s\[0-9\]+, s\[0-9\]+" } } */
+TEST (gt, >, d, 64, )
+/* { dg-final { scan-assembler "facgt\\td\[0-9\]+, d\[0-9\]+, d\[0-9\]+" } } */
+
+int
+main (int argc, char **argv)
+{
+  if (test_fcages_float32_t ())
+    abort ();
+  if (test_fcaged_float64_t ())
+    abort ();
+  if (test_fcagts_float32_t ())
+    abort ();
+  if (test_fcagtd_float64_t ())
+    abort ();
+  return 0;
+}
+
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/vect-vca.c b/gcc/testsuite/gcc.target/aarch64/vect-vca.c
new file mode 100644
index 0000000..c0cf2ef
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/vect-vca.c
@@ -0,0 +1,89 @@ 
+/* { dg-do run } */
+/* { dg-options "-O3 --save-temps" } */
+
+#include <arm_neon.h>
+
+extern void abort (void);
+extern float fabsf (float);
+extern double fabs (double);
+
+#define NUM_TESTS 8
+
+float input_s1[] = {0.1f, -0.1f, 0.4f, 10.3f, 200.0f, -800.0f, -13.0f, -0.5f};
+float input_s2[] = {-0.2f, 0.4f, 0.04f, -100.3f, 2.0f, -80.0f, 13.0f, -0.5f};
+double input_d1[] = {0.1, -0.1, 0.4, 10.3, 200.0, -800.0, -13.0, -0.5};
+double input_d2[] = {-0.2, 0.4, 0.04, -100.3, 2.0, -80.0, 13.0, -0.5};
+
+#define TEST(T, CMP, SUFFIX, WIDTH, LANES, Q, F)			\
+int									\
+test_vca##T##_float##WIDTH##x##LANES##_t (void)				\
+{									\
+  int ret = 0;								\
+  int i = 0;								\
+  uint##WIDTH##_t output[NUM_TESTS];					\
+									\
+  for (i = 0; i < NUM_TESTS; i++)					\
+    {									\
+      float##WIDTH##_t f1 = fabs##F (input_##SUFFIX##1[i]);		\
+      float##WIDTH##_t f2 = fabs##F (input_##SUFFIX##2[i]);		\
+      /* Inhibit optimization of our linear test loop.  */		\
+      asm volatile ("" : : : "memory");					\
+      output[i] = f1 CMP f2 ? -1 : 0;					\
+    }									\
+									\
+  for (i = 0; i < NUM_TESTS; i += LANES)				\
+    {									\
+      float##WIDTH##x##LANES##_t in1 =					\
+	vld1##Q##_f##WIDTH (input_##SUFFIX##1 + i);			\
+      float##WIDTH##x##LANES##_t in2 =					\
+	vld1##Q##_f##WIDTH (input_##SUFFIX##2 + i);			\
+      uint##WIDTH##x##LANES##_t expected_out =				\
+	vld1##Q##_u##WIDTH (output + i);				\
+      uint##WIDTH##x##LANES##_t out =					\
+	veor##Q##_u##WIDTH (vca##T##Q##_f##WIDTH (in1, in2),		\
+			    expected_out);				\
+      vst1##Q##_u##WIDTH (output + i, out);				\
+    }									\
+									\
+  for (i = 0; i < NUM_TESTS; i++)					\
+    ret |= output[i];							\
+									\
+  return ret;								\
+}
+
+#define BUILD_VARIANTS(T, CMP)	\
+TEST (T, CMP, s, 32, 2,  , f)	\
+TEST (T, CMP, s, 32, 4, q, f)	\
+TEST (T, CMP, d, 64, 2, q,  )
+
+BUILD_VARIANTS (ge, >=)
+/* { dg-final { scan-assembler "facge\\tv\[0-9\]+\.2s, v\[0-9\]+\.2s, v\[0-9\]+\.2s" } } */
+/* { dg-final { scan-assembler "facge\\tv\[0-9\]+\.4s, v\[0-9\]+\.4s, v\[0-9\]+\.4s" } } */
+/* { dg-final { scan-assembler "facge\\tv\[0-9\]+\.2d, v\[0-9\]+\.2d, v\[0-9\]+\.2d" } } */
+
+BUILD_VARIANTS (gt, >)
+/* { dg-final { scan-assembler "facgt\\tv\[0-9\]+\.2s, v\[0-9\]+\.2s, v\[0-9\]+\.2s" } } */
+/* { dg-final { scan-assembler "facgt\\tv\[0-9\]+\.4s, v\[0-9\]+\.4s, v\[0-9\]+\.4s" } } */
+/* { dg-final { scan-assembler "facgt\\tv\[0-9\]+\.2d, v\[0-9\]+\.2d, v\[0-9\]+\.2d" } } */
+
+/* No need for another scan-assembler as these tests
+   also generate facge, facgt instructions.  */
+BUILD_VARIANTS (le, <=)
+BUILD_VARIANTS (lt, <)
+
+#undef TEST
+#define TEST(T, CMP, SUFFIX, WIDTH, LANES, Q, F)	\
+if (test_vca##T##_float##WIDTH##x##LANES##_t ())	\
+  abort ();
+
+int
+main (int argc, char **argv)
+{
+BUILD_VARIANTS (ge, >=)
+BUILD_VARIANTS (gt, >)
+BUILD_VARIANTS (le, <=)
+BUILD_VARIANTS (lt, <)
+  return 0;
+}
+
+/* { dg-final { cleanup-saved-temps } } */