From patchwork Mon Apr 29 13:58:37 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 240373 Return-Path: X-Original-To: incoming-imx@patchwork.ozlabs.org Delivered-To: patchwork-incoming-imx@bilbo.ozlabs.org Received: from casper.infradead.org (casper.infradead.org [IPv6:2001:770:15f::2]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 0BCAB2C00B1 for ; Tue, 30 Apr 2013 00:05:15 +1000 (EST) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1UWohQ-0001hC-GF; Mon, 29 Apr 2013 14:05:00 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1UWohN-00023q-Nv; Mon, 29 Apr 2013 14:04:57 +0000 Received: from mail.free-electrons.com ([94.23.35.102]) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1UWohK-00023W-Ci for linux-arm-kernel@lists.infradead.org; Mon, 29 Apr 2013 14:04:54 +0000 Received: by mail.free-electrons.com (Postfix, from userid 106) id B894E752; Mon, 29 Apr 2013 16:04:49 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.3.2 (2011-06-06) on mail.free-electrons.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT, URIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.3.2 Received: from localhost (col31-4-88-188-83-94.fbx.proxad.net [88.188.83.94]) by mail.free-electrons.com (Postfix) with ESMTPSA id 5C3ED5C7; Mon, 29 Apr 2013 16:04:49 +0200 (CEST) From: Maxime Ripard To: Shawn Guo Subject: [PATCH] mxs: icoll: Add function to register an interrupt as FIQ source Date: Mon, 29 Apr 2013 15:58:37 +0200 Message-Id: <1367243917-5177-1-git-send-email-maxime.ripard@free-electrons.com> X-Mailer: git-send-email 1.8.1.2 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130429_100454_513908_CF2B68B5 X-CRM114-Status: GOOD ( 11.00 ) X-Spam-Score: -4.3 (----) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-4.3 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 SPF_PASS SPF: sender matches SPF record -2.4 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: Maxime Ripard , Russell King , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org List-Id: linux-imx-kernel.lists.patchwork.ozlabs.org MXS, unlike other ARM platforms, has no way to make a FIQ from an interrupt from a driver, without poking directly into the icoll. Add an exported function to do this. Signed-off-by: Maxime Ripard --- arch/arm/mach-mxs/icoll.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/arch/arm/mach-mxs/icoll.c b/arch/arm/mach-mxs/icoll.c index 8fb23af..1bb16da 100644 --- a/arch/arm/mach-mxs/icoll.c +++ b/arch/arm/mach-mxs/icoll.c @@ -16,6 +16,7 @@ * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. */ +#include #include #include #include @@ -34,6 +35,7 @@ #define HW_ICOLL_INTERRUPTn_SET(n) (0x0124 + (n) * 0x10) #define HW_ICOLL_INTERRUPTn_CLR(n) (0x0128 + (n) * 0x10) #define BM_ICOLL_INTERRUPTn_ENABLE 0x00000004 +#define BM_ICOLL_INTERRUPTn_FIQ_ENABLE 0x00000010 #define BV_ICOLL_LEVELACK_IRQLEVELACK__LEVEL0 0x1 #define ICOLL_NUM_IRQS 128 @@ -41,6 +43,15 @@ static void __iomem *icoll_base = MXS_IO_ADDRESS(MXS_ICOLL_BASE_ADDR); static struct irq_domain *icoll_domain; +void mxs_icoll_set_irq_fiq(unsigned int irq) +{ + struct irq_data *d = irq_get_irq_data(irq); + + __raw_writel(BM_ICOLL_INTERRUPTn_FIQ_ENABLE, + icoll_base + HW_ICOLL_INTERRUPTn_SET(d->hwirq)); +} +EXPORT_SYMBOL(mxs_icoll_set_irq_fiq); + static void icoll_ack_irq(struct irq_data *d) { /*