From patchwork Wed Mar 4 05:15:00 2009 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Benjamin Herrenschmidt X-Patchwork-Id: 24028 Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from ozlabs.org (localhost [127.0.0.1]) by ozlabs.org (Postfix) with ESMTP id 5369DDE319 for ; Wed, 4 Mar 2009 16:16:23 +1100 (EST) X-Original-To: linuxppc-dev@ozlabs.org Delivered-To: linuxppc-dev@ozlabs.org Received: by ozlabs.org (Postfix, from userid 1030) id 3C30ADDF9E; Wed, 4 Mar 2009 16:16:04 +1100 (EST) To: From: Benjamin Herrenschmidt Date: Wed, 04 Mar 2009 16:15:00 +1100 Subject: [PATCH] powerpc/mm: Unify PTE_RPN_SHIFT and _PAGE_CHG_MASK definitions Message-Id: <20090304051604.3C30ADDF9E@ozlabs.org> X-BeenThere: linuxppc-dev@ozlabs.org X-Mailman-Version: 2.1.11 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@ozlabs.org Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@ozlabs.org This updates the 32-bit headers to use the same definitions for the RPN shift inside the PTE as 64-bit, and thus updates _PAGE_CHG_MASK to become identical. This does introduce a runtime visible difference, which is that now, _PAGE_HASHPTE will be part of _PAGE_CHG_MASK and thus preserved. However this should have no practical effect as it should have been preserved in the first place and we got away with not having it there due to our PTE access functions preserving it anyway. Signed-off-by: Benjamin Herrenschmidt --- arch/powerpc/include/asm/pgtable-ppc32.h | 36 ++++++++++++++++++++----------- arch/powerpc/include/asm/pte-fsl-booke.h | 2 + 2 files changed, 26 insertions(+), 12 deletions(-) --- linux-work.orig/arch/powerpc/include/asm/pgtable-ppc32.h 2009-03-02 13:41:49.000000000 +1100 +++ linux-work/arch/powerpc/include/asm/pgtable-ppc32.h 2009-03-02 13:41:50.000000000 +1100 @@ -146,9 +146,29 @@ extern int icache_44x_need_flush; #define _PAGE_HPTEFLAGS _PAGE_HASHPTE -#define _PAGE_CHG_MASK (PAGE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY | \ - _PAGE_SPECIAL) +/* Location of the PFN in the PTE. Most platforms use the same as _PAGE_SHIFT + * here (ie, naturally aligned). Platform who don't just pre-define the + * value so we don't override it here + */ +#ifndef PTE_RPN_SHIFT +#define PTE_RPN_SHIFT (PAGE_SHIFT) +#endif + +#ifdef CONFIG_PTE_64BIT +#define PTE_RPN_MAX (1ULL << (64 - PTE_RPN_SHIFT)) +#define PTE_RPN_MASK (~((1ULL<> PFN_SHIFT_OFFSET) +#define pte_pfn(x) (pte_val(x) >> PTE_RPN_SHIFT) #define pte_page(x) pfn_to_page(pte_pfn(x)) -#define pfn_pte(pfn, prot) __pte(((pte_basic_t)(pfn) << PFN_SHIFT_OFFSET) |\ +#define pfn_pte(pfn, prot) __pte(((pte_basic_t)(pfn) << PTE_RPN_SHIFT) |\ pgprot_val(prot)) #define mk_pte(page, prot) pfn_pte(page_to_pfn(page), prot) #endif /* __ASSEMBLY__ */ Index: linux-work/arch/powerpc/include/asm/pte-fsl-booke.h =================================================================== --- linux-work.orig/arch/powerpc/include/asm/pte-fsl-booke.h 2009-03-02 13:41:49.000000000 +1100 +++ linux-work/arch/powerpc/include/asm/pte-fsl-booke.h 2009-03-02 13:41:50.000000000 +1100 @@ -36,6 +36,8 @@ #ifdef CONFIG_PTE_64BIT /* ERPN in a PTE never gets cleared, ignore it */ #define _PTE_NONE_MASK 0xffffffffffff0000ULL +/* We extend the size of the PTE flags area when using 64-bit PTEs */ +#define PTE_RPN_SHIFT (PAGE_SHIFT + 8) #endif #define _PMD_PRESENT 0