[v2] powerpc: add defintion for MSR[GS] to list of MSR bits

Message ID 1236097427-17977-1-git-send-email-timur@freescale.com
State Accepted, archived
Commit e465973d02c60d7f290f69eea560cc39f53ad5aa
Delegated to: Benjamin Herrenschmidt
Headers show

Commit Message

Timur Tabi March 3, 2009, 4:23 p.m.
Add macros for the GS (guest state) bit to the list of MSR bit definitions.
On PowerPC cores that support embedded hypervisor mode, GS is cleared if
the system is running in hypervisor state (and MSR[PR] is cleared), and set
if it's running in guest state.  See the Power ISA 2.06 specification for
more information.

Signed-off-by: Timur Tabi <timur@freescale.com>

v2: moved the definition from reg.h to reg_booke.h, where it belongs

 arch/powerpc/include/asm/reg_booke.h |    1 +
 1 files changed, 1 insertions(+), 0 deletions(-)


diff --git a/arch/powerpc/include/asm/reg_booke.h b/arch/powerpc/include/asm/reg_booke.h
index c030741..cf1c41f 100644
--- a/arch/powerpc/include/asm/reg_booke.h
+++ b/arch/powerpc/include/asm/reg_booke.h
@@ -10,6 +10,7 @@ 
 /* Machine State Register (MSR) Fields */
+#define MSR_GS		(1<<28) /* Guest state */
 #define MSR_UCLE	(1<<26)	/* User-mode cache lock enable */
 #define MSR_SPE		(1<<25)	/* Enable SPE */
 #define MSR_DWE		(1<<10)	/* Debug Wait Enable */