Patchwork powerpc/power8: fix secondary CPUs hanging on boot for HV=0

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Submitter Michael Neuling
Date April 25, 2013, 7 a.m.
Message ID <27249.1366873237@ale.ozlabs.ibm.com>
Download mbox | patch
Permalink /patch/239407/
State Accepted, archived
Commit 8c2a381734fc9718f127f4aba958e8a7958d4028
Delegated to: Benjamin Herrenschmidt
Headers show

Comments

Michael Neuling - April 25, 2013, 7 a.m.
In __restore_cpu_power8 we determine if we are HV and if not, we return
before setting HV only resources.

Unfortunately we forgot to restore the link register from r11 before
returning.

This will happen on boot and with secondary CPUs not coming online.

This adds the missing link register restore.

Signed-off-by: Michael Neuling <mikey@neuling.org>
Michael Neuling - April 25, 2013, 7:05 a.m.
Michael Neuling <mikey@neuling.org> wrote:

> In __restore_cpu_power8 we determine if we are HV and if not, we return
> before setting HV only resources.
> 
> Unfortunately we forgot to restore the link register from r11 before
> returning.
> 
> This will happen on boot and with secondary CPUs not coming online.
> 
> This adds the missing link register restore.
> 
> Signed-off-by: Michael Neuling <mikey@neuling.org>

cc: stable@kernel.org

> 
> diff --git a/arch/powerpc/kernel/cpu_setup_power.S b/arch/powerpc/kernel/cpu_setup_power.S
> index ea847ab..1167008 100644
> --- a/arch/powerpc/kernel/cpu_setup_power.S
> +++ b/arch/powerpc/kernel/cpu_setup_power.S
> @@ -66,6 +66,7 @@ _GLOBAL(__restore_cpu_power8)
>  	bl	__init_FSCR
>  	mfmsr	r3
>  	rldicl.	r0,r3,4,63
> +	mtlr	r11
>  	beqlr
>  	li	r0,0
>  	mtspr	SPRN_LPID,r0

Patch

diff --git a/arch/powerpc/kernel/cpu_setup_power.S b/arch/powerpc/kernel/cpu_setup_power.S
index ea847ab..1167008 100644
--- a/arch/powerpc/kernel/cpu_setup_power.S
+++ b/arch/powerpc/kernel/cpu_setup_power.S
@@ -66,6 +66,7 @@  _GLOBAL(__restore_cpu_power8)
 	bl	__init_FSCR
 	mfmsr	r3
 	rldicl.	r0,r3,4,63
+	mtlr	r11
 	beqlr
 	li	r0,0
 	mtspr	SPRN_LPID,r0