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[178.255.168.63]) by mx.google.com with ESMTPS id q20sm15039803wiv.7.2013.04.23.03.47.08 (version=TLSv1.1 cipher=RC4-SHA bits=128/128); Tue, 23 Apr 2013 03:47:09 -0700 (PDT) From: Michal Simek To: u-boot@lists.denx.de, Joe Hershberger , Albert Aribaud , Tom Rini Date: Tue, 23 Apr 2013 12:46:11 +0200 Message-Id: <72177ffb040b277f835243f50c373708d0ae2697.1366713845.git.michal.simek@xilinx.com> X-Mailer: git-send-email 1.8.2.1 In-Reply-To: References: In-Reply-To: References: X-Gm-Message-State: ALoCoQlrh8lu5N6hBbgm4JzQ2/fZeiZXQks+2x82cjQXy+27N9b/xncet1mQ4nGwt/Gfe19hWnk5 Cc: Peter Crosthwaite , Jagannadha Sutradharudu Teki Subject: [U-Boot] [PATCH v2 12/15] net: gem: Add support for phy autodetection X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de Autodetect phy if phyaddress is setup to -1. Signed-off-by: Michal Simek --- Changes in v2: None drivers/net/zynq_gem.c | 51 ++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 51 insertions(+) -- 1.8.2.1 diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c index 8e0e01c..eac9b6f 100644 --- a/drivers/net/zynq_gem.c +++ b/drivers/net/zynq_gem.c @@ -95,6 +95,17 @@ ZYNQ_GEM_DMACR_TXSIZE | \ ZYNQ_GEM_DMACR_RXBUF) +/* Use MII register 1 (MII status register) to detect PHY */ +#define PHY_DETECT_REG 1 + +/* Mask used to verify certain PHY features (or register contents) + * in the register above: + * 0x1000: 10Mbps full duplex support + * 0x0800: 10Mbps half duplex support + * 0x0008: Auto-negotiation support + */ +#define PHY_DETECT_MASK 0x1808 + /* Device registers */ struct zynq_gem_regs { u32 nwctrl; /* Network Control reg */ @@ -201,6 +212,44 @@ static u32 phywrite(struct eth_device *dev, u32 phy_addr, u32 regnum, u16 data) ZYNQ_GEM_PHYMNTNC_OP_W_MASK, &data); } +static void phy_detection(struct eth_device *dev) +{ + int i; + u16 phyreg; + struct zynq_gem_priv *priv = dev->priv; + + if (priv->phyaddr != -1) { + phyread(dev, priv->phyaddr, PHY_DETECT_REG, &phyreg); + if ((phyreg != 0xFFFF) && + ((phyreg & PHY_DETECT_MASK) == PHY_DETECT_MASK)) { + /* Found a valid PHY address */ + debug("Default phy address %d is valid\n", + priv->phyaddr); + return; + } else { + debug("PHY address is not setup correctly %d\n", + priv->phyaddr); + priv->phyaddr = -1; + } + } + + debug("detecting phy address\n"); + if (priv->phyaddr == -1) { + /* detect the PHY address */ + for (i = 31; i >= 0; i--) { + phyread(dev, i, PHY_DETECT_REG, &phyreg); + if ((phyreg != 0xFFFF) && + ((phyreg & PHY_DETECT_MASK) == PHY_DETECT_MASK)) { + /* Found a valid PHY address */ + priv->phyaddr = i; + debug("Found valid phy address, %d\n", i); + return; + } + } + } + printf("PHY is not detected\n"); +} + static int zynq_gem_setup_mac(struct eth_device *dev) { u32 i, macaddrlow, macaddrhigh; @@ -290,6 +339,8 @@ static int zynq_gem_init(struct eth_device *dev, bd_t * bis) priv->init++; } + phy_detection(dev); + /* interface - look at tsec */ phydev = phy_connect(priv->bus, priv->phyaddr, dev, 0);