Patchwork [U-Boot,07/11] powerpc/ppc4xx: Use generic FPGA accessors on all gdsys 405ep/ex boards

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Submitter Dirk Eibach
Date April 22, 2013, 11:16 a.m.
Message ID <1366629372-32022-8-git-send-email-eibach@gdsys.de>
Download mbox | patch
Permalink /patch/238462/
State Superseded
Delegated to: Stefan Roese
Headers show

Comments

Dirk Eibach - April 22, 2013, 11:16 a.m.
Signed-off-by: Dirk Eibach <eibach@gdsys.de>
---
 board/gdsys/405ep/dlvision-10g.c |   20 ++++++++++++++------
 board/gdsys/405ep/io.c           |   20 ++++++++++++++------
 board/gdsys/405ep/neo.c          |   17 +++++++++++++----
 board/gdsys/405ex/405ex.c        |   14 ++++++--------
 board/gdsys/405ex/io64.c         |   38 ++++++++++++++++++++++----------------
 5 files changed, 69 insertions(+), 40 deletions(-)

Patch

diff --git a/board/gdsys/405ep/dlvision-10g.c b/board/gdsys/405ep/dlvision-10g.c
index 644493b..4d1a02e 100644
--- a/board/gdsys/405ep/dlvision-10g.c
+++ b/board/gdsys/405ep/dlvision-10g.c
@@ -71,6 +71,16 @@  enum {
 	RAM_DDR2_64 = 2,
 };
 
+void fpga_set_reg(unsigned int fpga, u16 reg, u16 data)
+{
+	out_le16((u16 *)CONFIG_SYS_FPGA_BASE(fpga) + reg / sizeof(u16), data);
+}
+
+u16 fpga_get_reg(unsigned int fpga, u16 reg)
+{
+	return in_le16((u16 *)CONFIG_SYS_FPGA_BASE(fpga) + reg / sizeof(u16));
+}
+
 int misc_init_r(void)
 {
 	/* startup fans */
@@ -95,10 +105,9 @@  static unsigned int get_mc2_present(void)
 
 static void print_fpga_info(unsigned dev)
 {
-	struct ihs_fpga *fpga = (struct ihs_fpga *) CONFIG_SYS_FPGA_BASE(dev);
-	u16 versions = in_le16(&fpga->versions);
-	u16 fpga_version = in_le16(&fpga->fpga_version);
-	u16 fpga_features = in_le16(&fpga->fpga_features);
+	u16 versions = fpga_get_reg(dev, REG(versions));
+	u16 fpga_version = fpga_get_reg(dev, REG(fpga_version));
+	u16 fpga_features = fpga_get_reg(dev, REG(fpga_features));
 	unsigned unit_type;
 	unsigned hardware_version;
 	unsigned feature_rs232;
@@ -263,8 +272,7 @@  int checkboard(void)
 
 int last_stage_init(void)
 {
-	struct ihs_fpga *fpga = (struct ihs_fpga *) CONFIG_SYS_FPGA_BASE(0);
-	u16 versions = in_le16(&fpga->versions);
+	u16 versions = fpga_get_reg(0, REG(versions));
 
 	print_fpga_info(0);
 	if (get_mc2_present())
diff --git a/board/gdsys/405ep/io.c b/board/gdsys/405ep/io.c
index 070dcbb..dbaf9d6 100644
--- a/board/gdsys/405ep/io.c
+++ b/board/gdsys/405ep/io.c
@@ -53,6 +53,16 @@  enum {
 	HWVER_122 = 3,
 };
 
+void fpga_set_reg(unsigned int fpga, u16 reg, u16 data)
+{
+	out_le16((u16 *)CONFIG_SYS_FPGA_BASE(fpga) + reg / sizeof(u16), data);
+}
+
+u16 fpga_get_reg(unsigned int fpga, u16 reg)
+{
+	return in_le16((u16 *)CONFIG_SYS_FPGA_BASE(fpga) + reg / sizeof(u16));
+}
+
 int misc_init_r(void)
 {
 	/* startup fans */
@@ -117,10 +127,9 @@  int checkboard(void)
 
 static void print_fpga_info(void)
 {
-	struct ihs_fpga *fpga = (struct ihs_fpga *) CONFIG_SYS_FPGA_BASE(0);
-	u16 versions = in_le16(&fpga->versions);
-	u16 fpga_version = in_le16(&fpga->fpga_version);
-	u16 fpga_features = in_le16(&fpga->fpga_features);
+	u16 versions = fpga_get_reg(0, REG(versions));
+	u16 fpga_version = fpga_get_reg(0, REG(fpga_version));
+	u16 fpga_features = fpga_get_reg(0, REG(fpga_features));
 	unsigned unit_type;
 	unsigned hardware_version;
 	unsigned feature_channels;
@@ -179,7 +188,6 @@  static void print_fpga_info(void)
  */
 int last_stage_init(void)
 {
-	struct ihs_fpga *fpga = (struct ihs_fpga *) CONFIG_SYS_FPGA_BASE(0);
 	unsigned int k;
 
 	print_fpga_info();
@@ -191,7 +199,7 @@  int last_stage_init(void)
 		configure_gbit_phy(k);
 
 	/* take fpga serdes blocks out of reset */
-	out_le16(&fpga->quad_serdes_reset, 0);
+	fpga_set_reg(0, REG(quad_serdes_reset), 0);
 
 	return 0;
 }
diff --git a/board/gdsys/405ep/neo.c b/board/gdsys/405ep/neo.c
index d336e55..f06a280 100644
--- a/board/gdsys/405ep/neo.c
+++ b/board/gdsys/405ep/neo.c
@@ -44,6 +44,16 @@  enum {
 	HWVER_300 = 3,
 };
 
+void fpga_set_reg(unsigned int fpga, u16 reg, u16 data)
+{
+	out_le16((u16 *)CONFIG_SYS_FPGA_BASE(fpga) + reg / sizeof(u16), data);
+}
+
+u16 fpga_get_reg(unsigned int fpga, u16 reg)
+{
+	return in_le16((u16 *)CONFIG_SYS_FPGA_BASE(fpga) + reg / sizeof(u16));
+}
+
 int misc_init_r(void)
 {
 	/* startup fans */
@@ -70,10 +80,9 @@  int checkboard(void)
 
 static void print_fpga_info(void)
 {
-	struct ihs_fpga *fpga = (struct ihs_fpga *) CONFIG_SYS_FPGA_BASE(0);
-	u16 versions = in_le16(&fpga->versions);
-	u16 fpga_version = in_le16(&fpga->fpga_version);
-	u16 fpga_features = in_le16(&fpga->fpga_features);
+	u16 versions = fpga_get_reg(0, REG(versions));
+	u16 fpga_version = fpga_get_reg(0, REG(fpga_version));
+	u16 fpga_features = fpga_get_reg(0, REG(fpga_features));
 	int fpga_state = get_fpga_state(0);
 	unsigned unit_type;
 	unsigned hardware_version;
diff --git a/board/gdsys/405ex/405ex.c b/board/gdsys/405ex/405ex.c
index 32e24c0..b7e9802 100644
--- a/board/gdsys/405ex/405ex.c
+++ b/board/gdsys/405ex/405ex.c
@@ -220,23 +220,21 @@  int board_early_init_r(void)
 	gd405ex_set_fpga_reset(0);
 
 	for (k = 0; k < CONFIG_SYS_FPGA_COUNT; ++k) {
-		struct ihs_fpga *fpga =
-			(struct ihs_fpga *)CONFIG_SYS_FPGA_BASE(k);
 #ifdef CONFIG_SYS_FPGA_NO_RFL_HI
-		u16 *reflection_target = &fpga->reflection_low;
+		u16 reflection_target = REG(reflection_low);
 #else
-		u16 *reflection_target = &fpga->reflection_high;
+		u16 reflection_target = REG(reflection_high);
 #endif
 		/*
 		 * wait for fpga out of reset
 		 */
 		ctr = 0;
 		while (1) {
-			out_le16(&fpga->reflection_low,
-				REFLECTION_TESTPATTERN);
+			fpga_set_reg(k, REG(reflection_low),
+				     REFLECTION_TESTPATTERN);
 
-			if (in_le16(reflection_target) ==
-				REFLECTION_TESTPATTERN_INV)
+			if (fpga_get_reg(k, reflection_target) ==
+			    REFLECTION_TESTPATTERN_INV)
 				break;
 
 			udelay(100000);
diff --git a/board/gdsys/405ex/io64.c b/board/gdsys/405ex/io64.c
index 7d2899d..f0f4241 100644
--- a/board/gdsys/405ex/io64.c
+++ b/board/gdsys/405ex/io64.c
@@ -67,6 +67,16 @@  enum {
 	HWVER_110 = 1,
 };
 
+void fpga_set_reg(unsigned int fpga, u16 reg, u16 data)
+{
+	out_le16((u16 *)CONFIG_SYS_FPGA_BASE(fpga) + reg / sizeof(u16), data);
+}
+
+u16 fpga_get_reg(unsigned int fpga, u16 reg)
+{
+	return in_le16((u16 *)CONFIG_SYS_FPGA_BASE(fpga) + reg / sizeof(u16));
+}
+
 static inline void blank_string(int size)
 {
 	int i;
@@ -100,10 +110,9 @@  int misc_init_r(void)
 
 static void print_fpga_info(unsigned dev)
 {
-	struct ihs_fpga *fpga = (struct ihs_fpga *) CONFIG_SYS_FPGA_BASE(dev);
-	u16 versions = in_le16(&fpga->versions);
-	u16 fpga_version = in_le16(&fpga->fpga_version);
-	u16 fpga_features = in_le16(&fpga->fpga_features);
+	u16 versions = fpga_get_reg(dev, REG(versions));
+	u16 fpga_version = fpga_get_reg(dev, REG(fpga_version));
+	u16 fpga_features = fpga_get_reg(dev, REG(fpga_features));
 	int fpga_state = get_fpga_state(dev);
 
 	unsigned unit_type;
@@ -242,8 +251,6 @@  int last_stage_init(void)
 {
 	unsigned int k;
 	unsigned int fpga;
-	struct ihs_fpga *fpga0 = (struct ihs_fpga *) CONFIG_SYS_FPGA_BASE(0);
-	struct ihs_fpga *fpga1 = (struct ihs_fpga *) CONFIG_SYS_FPGA_BASE(1);
 	int failed = 0;
 	char str_phys[] = "Setup PHYs -";
 	char str_serdes[] = "Start SERDES blocks";
@@ -281,17 +288,16 @@  int last_stage_init(void)
 	/* take fpga serdes blocks out of reset */
 	puts(str_serdes);
 	udelay(500000);
-	out_le16(&fpga0->quad_serdes_reset, 0);
-	out_le16(&fpga1->quad_serdes_reset, 0);
+	fpga_set_reg(0, REG(quad_serdes_reset), 0);
+	fpga_set_reg(1, REG(quad_serdes_reset), 0);
 	blank_string(strlen(str_serdes));
 
 	/* take channels out of reset */
 	puts(str_channels);
 	udelay(500000);
 	for (fpga = 0; fpga < 2; ++fpga) {
-		u16 *ch0_config_int = &(fpga ? fpga1 : fpga0)->ch0_config_int;
 		for (k = 0; k < 32; ++k)
-			out_le16(ch0_config_int + 4 * k, 0);
+			fpga_set_reg(fpga, REG(ch0_config_int) + 8 * k, 0);
 	}
 	blank_string(strlen(str_channels));
 
@@ -299,16 +305,16 @@  int last_stage_init(void)
 	puts(str_locks);
 	udelay(500000);
 	for (fpga = 0; fpga < 2; ++fpga) {
-		u16 *ch0_status_int = &(fpga ? fpga1 : fpga0)->ch0_status_int;
 		for (k = 0; k < 32; ++k) {
-			u16 status = in_le16(ch0_status_int + 4*k);
+			u16 status =
+				fpga_get_reg(fpga, REG(ch0_status_int) + 8 * k);
 			if (!(status & (1 << 4))) {
 				failed = 1;
 				printf("fpga %d channel %d: no serdes lock\n",
 					fpga, k);
 			}
 			/* reset events */
-			out_le16(ch0_status_int + 4*k, status);
+			fpga_set_reg(fpga, REG(ch0_status_int) + 8 * k, 0);
 		}
 	}
 	blank_string(strlen(str_locks));
@@ -316,14 +322,14 @@  int last_stage_init(void)
 	/* verify hicb_status */
 	puts(str_hicb);
 	for (fpga = 0; fpga < 2; ++fpga) {
-		u16 *ch0_hicb_status_int = &(fpga ? fpga1 : fpga0)->ch0_hicb_status_int;
 		for (k = 0; k < 32; ++k) {
-			u16 status = in_le16(ch0_hicb_status_int + 4*k);
+			u16 status =
+				fpga_get_reg(fpga, REG(ch0_status_int) + 8 * k);
 			if (status)
 				printf("fpga %d hicb %d: hicb status %04x\n",
 					fpga, k, status);
 			/* reset events */
-			out_le16(ch0_hicb_status_int + 4*k, status);
+			fpga_set_reg(fpga, REG(ch0_status_int) + 8 * k, 0);
 		}
 	}
 	blank_string(strlen(str_hicb));