diff mbox

[U-Boot,2/6] mpc85xx: Add CONFIG_RELEASE_CORE0_ONLY

Message ID 1366628805-29964-3-git-send-email-eibach@gdsys.de
State Superseded
Delegated to: Tom Rini
Headers show

Commit Message

Dirk Eibach April 22, 2013, 11:06 a.m. UTC
If CONFIG_RELEASE_CORE0_ONLY is set, all cores except core0 are kept in
holdoff mode.

Signed-off-by: Dirk Eibach <eibach@gdsys.de>
---
 arch/powerpc/cpu/mpc85xx/mp.c |    8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)
diff mbox

Patch

diff --git a/arch/powerpc/cpu/mpc85xx/mp.c b/arch/powerpc/cpu/mpc85xx/mp.c
index 43d4836..73c1024 100644
--- a/arch/powerpc/cpu/mpc85xx/mp.c
+++ b/arch/powerpc/cpu/mpc85xx/mp.c
@@ -350,7 +350,11 @@  static void plat_mp_up(unsigned long bootpg, unsigned int pagesize)
 	volatile ccsr_pic_t *pic = (void *)(CONFIG_SYS_MPC8xxx_PIC_ADDR);
 	u32 devdisr;
 	int timeout = 10;
+	int numcores = 1;
 
+#ifndef CONFIG_RELEASE_CORE0_ONLY
+	numcores = cpu_numcores();
+#endif
 	whoami = in_be32(&pic->whoami);
 	out_be32(&ecm->bptr, 0x80000000 | (bootpg >> 12));
 
@@ -363,7 +367,7 @@  static void plat_mp_up(unsigned long bootpg, unsigned int pagesize)
 	out_be32(&gur->devdisr, devdisr);
 
 	/* release the hounds */
-	up = ((1 << cpu_numcores()) - 1);
+	up = ((1 << numcores) - 1);
 	bpcr = in_be32(&ecm->eebpcr);
 	bpcr |= (up << 24);
 	out_be32(&ecm->eebpcr, bpcr);
@@ -373,7 +377,7 @@  static void plat_mp_up(unsigned long bootpg, unsigned int pagesize)
 	/* wait for everyone */
 	while (timeout) {
 		int i;
-		for (i = 0; i < cpu_numcores(); i++) {
+		for (i = 0; i < numcores; i++) {
 			if (table[i * NUM_BOOT_ENTRY + BOOT_ENTRY_ADDR_LOWER])
 				cpu_up_mask |= (1 << i);
 		};