From patchwork Mon Apr 22 05:17:09 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Crosthwaite X-Patchwork-Id: 238328 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 6B8042C0109 for ; Mon, 22 Apr 2013 15:19:25 +1000 (EST) Received: from localhost ([::1]:35265 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UU99v-0005ks-Jj for incoming@patchwork.ozlabs.org; Mon, 22 Apr 2013 01:19:23 -0400 Received: from eggs.gnu.org ([208.118.235.92]:59473) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UU99a-0005hY-ID for qemu-devel@nongnu.org; Mon, 22 Apr 2013 01:19:04 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1UU99Z-0004jn-Lg for qemu-devel@nongnu.org; Mon, 22 Apr 2013 01:19:02 -0400 Received: from mail-pd0-f176.google.com ([209.85.192.176]:49931) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UU99Z-0004jb-Fl for qemu-devel@nongnu.org; Mon, 22 Apr 2013 01:19:01 -0400 Received: by mail-pd0-f176.google.com with SMTP id r11so3291365pdi.7 for ; Sun, 21 Apr 2013 22:19:00 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-received:sender:from:to:cc:subject:date:message-id:x-mailer :in-reply-to:references:x-gm-message-state; bh=N9ze9kkRLKuT4EJoN9iCVFCM+h7KpR5UXk2ZyEH8+ew=; b=MUpRBR1zzrhGKt0wUfHlPODzh9DeMieN2KSr+H2NWbWlR0rBraOpXfeoannJAtEg79 2hHZlelCe2/pXixtCHAKpkUFqjOZpS5S/lENARAgviJajj+uYez5IU5KidSyvYqQwePc 3Bs+Qsk8sk6n4AemdKSc+VH7LsPDAHxiBqzFPv6OuStxtwWEMel6cm2IrF9wZuIsmQfk sZAihgtpgmAedqG8V0QAfbN7s9N3iIFVl70uL9NZBsSGN/D5KS/ILBLYY4YwcYdyipdr fp5aP4zG71N1Pn7gmEkt3KnZXoUueTdPibIod6l/bs7vkrr3D3exu7x/z1jo8TWjRpqv NBtQ== X-Received: by 10.66.102.106 with SMTP id fn10mr26976286pab.192.1366607940679; Sun, 21 Apr 2013 22:19:00 -0700 (PDT) Received: from localhost ([149.199.62.254]) by mx.google.com with ESMTPS id fm2sm8688811pab.13.2013.04.21.22.18.58 (version=TLSv1.1 cipher=RC4-SHA bits=128/128); Sun, 21 Apr 2013 22:18:59 -0700 (PDT) From: peter.crosthwaite@xilinx.com To: qemu-devel@nongnu.org Date: Mon, 22 Apr 2013 15:17:09 +1000 Message-Id: <7144a3fd23aaf2791c60626e9ffa0fa8bd428087.1366606958.git.peter.crosthwaite@xilinx.com> X-Mailer: git-send-email 1.7.0.4 In-Reply-To: References: X-Gm-Message-State: ALoCoQmLoYvk5ye3baPE6G1b4kldrJWLh1KQl7pw00i/ofl8Eb3MpcxV99Qg7sB0On1GpO5CT5Eg X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [fuzzy] X-Received-From: 209.85.192.176 Cc: peter.maydell@linaro.org, edgar.iglesias@gmail.com Subject: [Qemu-devel] [PATCH for-1.5 v3 09/15] xilinx_spips: lqspi: Dont touch config register X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Peter Crosthwaite The LQSPI mode is supposed to work via the automatic CS mode feature rather than manipulate CS lines itself. Now that auto CS is implemented remove LQSPIs CS mode override logic. There is still a need to manipulate the U_PAGE bit in LQSPI config register to implement dual-stack mode however. Signed-off-by: Peter Crosthwaite Reviewed-by: Peter Maydell --- This patch in new as of v2 hw/ssi/xilinx_spips.c | 12 ++++++------ 1 files changed, 6 insertions(+), 6 deletions(-) diff --git a/hw/ssi/xilinx_spips.c b/hw/ssi/xilinx_spips.c index 3f31a32..2ee3958 100644 --- a/hw/ssi/xilinx_spips.c +++ b/hw/ssi/xilinx_spips.c @@ -511,16 +511,16 @@ lqspi_read(void *opaque, hwaddr addr, unsigned int size) int flash_addr = (addr / num_effective_busses(s)); int slave = flash_addr >> LQSPI_ADDRESS_BITS; int cache_entry = 0; + uint32_t u_page_save = s->regs[R_LQSPI_STS] & ~LQSPI_CFG_U_PAGE; + + s->regs[R_LQSPI_STS] &= ~LQSPI_CFG_U_PAGE; + s->regs[R_LQSPI_STS] |= slave ? LQSPI_CFG_U_PAGE : 0; DB_PRINT("config reg status: %08x\n", s->regs[R_LQSPI_CFG]); fifo8_reset(&s->tx_fifo); fifo8_reset(&s->rx_fifo); - s->regs[R_CONFIG] &= ~CS; - s->regs[R_CONFIG] |= ((~(1 << slave) << CS_SHIFT) & CS) | MANUAL_CS; - xilinx_spips_update_cs_lines(s); - /* instruction */ DB_PRINT("pushing read instruction: %02x\n", (uint8_t)(s->regs[R_LQSPI_CFG] & LQSPI_CFG_INST_CODE)); @@ -554,9 +554,9 @@ lqspi_read(void *opaque, hwaddr addr, unsigned int size) rx_data_bytes(s, &q->lqspi_buf[cache_entry], 4); cache_entry++; } - xilinx_spips_update_cs_lines(s); - s->regs[R_CONFIG] |= CS; + s->regs[R_LQSPI_STS] &= ~LQSPI_CFG_U_PAGE; + s->regs[R_LQSPI_STS] |= u_page_save; xilinx_spips_update_cs_lines(s); q->lqspi_cached_addr = addr;