From patchwork Mon Apr 22 05:14:34 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Crosthwaite X-Patchwork-Id: 238324 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 038EB2C0103 for ; Mon, 22 Apr 2013 15:17:00 +1000 (EST) Received: from localhost ([::1]:55898 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UU97a-0001dD-4s for incoming@patchwork.ozlabs.org; Mon, 22 Apr 2013 01:16:58 -0400 Received: from eggs.gnu.org ([208.118.235.92]:59003) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UU976-0001Yg-Dj for qemu-devel@nongnu.org; Mon, 22 Apr 2013 01:16:29 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1UU974-0004MS-Ej for qemu-devel@nongnu.org; Mon, 22 Apr 2013 01:16:28 -0400 Received: from mail-pa0-f45.google.com ([209.85.220.45]:47202) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UU974-0004ME-92 for qemu-devel@nongnu.org; Mon, 22 Apr 2013 01:16:26 -0400 Received: by mail-pa0-f45.google.com with SMTP id lf10so389300pab.32 for ; Sun, 21 Apr 2013 22:16:25 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-received:sender:from:to:cc:subject:date:message-id:x-mailer :in-reply-to:references:x-gm-message-state; bh=uli+nUwRcDohF/mc6iLIydgYZgJlVDhQrSNShbnuCwM=; b=J7FoNJjyF9Q+K/kHPyypaLEEwSdNVERNFijoQEK/Zf1HM5g2UQ/yG1DGL9w3QW0nQu GD7PBoYkhvXXU+/rJvkrkwJ/Gw+fHixvxD1eBzrOAxQ8qrPhbbKBvrlSh7Z0W+A9Z0np HyzCfi38QzX5ulLBIpNf7hoB4NBfjkDYKUSwlxXEk4AvM/jGalqy5AphDhO3qzpvJ59G P+SSUXKfduyS902mpnYTTvY+pOSxEcGbVHr9FRRR/lhNPsuXNwd5yjwctNPqeeasT+0k Led3R63UY1tOJM47vJ9mLonUQuaGLQr+XduL4OhzuroTWIKcoi3FLcQdGnf6pyzGWcVs PGLw== X-Received: by 10.66.81.2 with SMTP id v2mr14222539pax.204.1366607785588; Sun, 21 Apr 2013 22:16:25 -0700 (PDT) Received: from localhost ([149.199.62.254]) by mx.google.com with ESMTPS id zv4sm23532386pbb.28.2013.04.21.22.16.23 (version=TLSv1.1 cipher=RC4-SHA bits=128/128); Sun, 21 Apr 2013 22:16:24 -0700 (PDT) From: peter.crosthwaite@xilinx.com To: qemu-devel@nongnu.org Date: Mon, 22 Apr 2013 15:14:34 +1000 Message-Id: <7a198d3380bab621c159b41b19a47d0df1b099ab.1366606958.git.peter.crosthwaite@xilinx.com> X-Mailer: git-send-email 1.7.0.4 In-Reply-To: References: X-Gm-Message-State: ALoCoQnfAjc1fpSi0d5gsFhXFFMuogilYCUoKru1UAssuY8+QfmuyeinGOLt4LFTPzvtz4ELFJ5q X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [fuzzy] X-Received-From: 209.85.220.45 Cc: peter.maydell@linaro.org, edgar.iglesias@gmail.com Subject: [Qemu-devel] [PATCH for-1.5 v3 05/15] xilinx_spips: Fix QSPI FIFO size X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Peter Crosthwaite QSPI has a bigger FIFO than the regular SPI controller. Differentiate between the two with correct FIFO sizes for each. This is the first piece of class data for SPIPS, so this patch sees the creation of the XilinxSPIPSClass definition and assoicated QOM constructs. Signed-off-by: Peter Crosthwaite Reviewed-by: Peter Maydell --- changed from v1: Reimplemented using class data (PMM review) hw/ssi/xilinx_spips.c | 27 +++++++++++++++++++++++++-- 1 files changed, 25 insertions(+), 2 deletions(-) diff --git a/hw/ssi/xilinx_spips.c b/hw/ssi/xilinx_spips.c index 29636ce..e351cb2 100644 --- a/hw/ssi/xilinx_spips.c +++ b/hw/ssi/xilinx_spips.c @@ -106,6 +106,9 @@ #define RXFF_A 32 #define TXFF_A 32 +#define RXFF_A_Q (64 * 4) +#define TXFF_A_Q (64 * 4) + /* 16MB per linear region */ #define LQSPI_ADDRESS_BITS 24 /* Bite off 4k chunks at a time */ @@ -159,12 +162,23 @@ typedef struct { hwaddr lqspi_cached_addr; } XilinxQSPIPS; +typedef struct XilinxSPIPSClass { + SysBusDeviceClass parent_class; + + uint32_t rx_fifo_size; + uint32_t tx_fifo_size; +} XilinxSPIPSClass; #define TYPE_XILINX_SPIPS "xlnx.ps7-spi" #define TYPE_XILINX_QSPIPS "xlnx.ps7-qspi" #define XILINX_SPIPS(obj) \ OBJECT_CHECK(XilinxSPIPS, (obj), TYPE_XILINX_SPIPS) +#define XILINX_SPIPS_CLASS(klass) \ + OBJECT_CLASS_CHECK(XilinxSPIPSClass, (klass), TYPE_XILINX_SPIPS) +#define XILINX_SPIPS_GET_CLASS(obj) \ + OBJECT_GET_CLASS(XilinxSPIPSClass, (obj), TYPE_XILINX_SPIPS) + #define XILINX_QSPIPS(obj) \ OBJECT_CHECK(XilinxQSPIPS, (obj), TYPE_XILINX_QSPIPS) @@ -531,6 +545,7 @@ static void xilinx_spips_realize(DeviceState *dev, Error **errp) { XilinxSPIPS *s = XILINX_SPIPS(dev); SysBusDevice *sbd = SYS_BUS_DEVICE(dev); + XilinxSPIPSClass *xsc = XILINX_SPIPS_GET_CLASS(s); int i; DB_PRINT("realized spips\n"); @@ -555,8 +570,8 @@ static void xilinx_spips_realize(DeviceState *dev, Error **errp) s->irqline = -1; - fifo8_create(&s->rx_fifo, RXFF_A); - fifo8_create(&s->tx_fifo, TXFF_A); + fifo8_create(&s->rx_fifo, xsc->rx_fifo_size); + fifo8_create(&s->tx_fifo, xsc->tx_fifo_size); } static void xilinx_qspips_realize(DeviceState *dev, Error **errp) @@ -611,18 +626,25 @@ static Property xilinx_spips_properties[] = { static void xilinx_qspips_class_init(ObjectClass *klass, void * data) { DeviceClass *dc = DEVICE_CLASS(klass); + XilinxSPIPSClass *xsc = XILINX_SPIPS_CLASS(klass); dc->realize = xilinx_qspips_realize; + xsc->rx_fifo_size = RXFF_A_Q; + xsc->tx_fifo_size = TXFF_A_Q; } static void xilinx_spips_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); + XilinxSPIPSClass *xsc = XILINX_SPIPS_CLASS(klass); dc->realize = xilinx_spips_realize; dc->reset = xilinx_spips_reset; dc->props = xilinx_spips_properties; dc->vmsd = &vmstate_xilinx_spips; + + xsc->rx_fifo_size = RXFF_A; + xsc->tx_fifo_size = TXFF_A; } static const TypeInfo xilinx_spips_info = { @@ -630,6 +652,7 @@ static const TypeInfo xilinx_spips_info = { .parent = TYPE_SYS_BUS_DEVICE, .instance_size = sizeof(XilinxSPIPS), .class_init = xilinx_spips_class_init, + .class_size = sizeof (XilinxSPIPSClass), }; static const TypeInfo xilinx_qspips_info = {