From patchwork Fri Apr 19 02:06:09 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Crosthwaite X-Patchwork-Id: 237806 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 917752C0217 for ; Fri, 19 Apr 2013 12:08:41 +1000 (EST) Received: from localhost ([::1]:46298 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UT0kh-0001Od-O4 for incoming@patchwork.ozlabs.org; Thu, 18 Apr 2013 22:08:39 -0400 Received: from eggs.gnu.org ([208.118.235.92]:57680) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UT0kJ-0001LH-DS for qemu-devel@nongnu.org; Thu, 18 Apr 2013 22:08:16 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1UT0kH-0003Ry-Q8 for qemu-devel@nongnu.org; Thu, 18 Apr 2013 22:08:15 -0400 Received: from mail-da0-x22a.google.com ([2607:f8b0:400e:c00::22a]:50086) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UT0kH-0003Rq-Ka for qemu-devel@nongnu.org; Thu, 18 Apr 2013 22:08:13 -0400 Received: by mail-da0-f42.google.com with SMTP id n15so1224396dad.15 for ; Thu, 18 Apr 2013 19:08:13 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-received:sender:from:to:cc:subject:date:message-id:x-mailer :in-reply-to:references:x-gm-message-state; bh=BFD688mImrvvDVLeP7GSmi+ag4OYkFjl9Gz1uzy5f/E=; b=Fogu6eFW5qvy78pJrUj7I7NOIOX2vFWdw31NJotmmjpOgeFE98JfWtfjZJvbSJIRAb QLlpf8v/OUvjEyzc/n93xkpq00sWOKn2P9UinBCp8KSKSdLNqCUwa66AOaH6a0ErXKZr yMNgj7gbc5oOUVpSDRh2LtORlD3fqhe20R09LESF5bhSlcx0O+FWP54bCBy5M4HD6dpJ 4LJq259w2ycAkJZCLJ6UtaKpC0gXLlqInjhzknQFGTUSeLzl3m0a0IxBOOK8qt5Zoa85 2CW6/V5ohm/bh12iEzTM9VmOPiBxw0Hy8YNsr9sQ88j2DsO46GQ/PT6qoUkbKRcTWx56 oKKQ== X-Received: by 10.68.164.163 with SMTP id yr3mr15884198pbb.27.1366337292996; Thu, 18 Apr 2013 19:08:12 -0700 (PDT) Received: from localhost ([149.199.62.254]) by mx.google.com with ESMTPS id gi2sm11625541pbb.2.2013.04.18.19.08.10 (version=TLSv1.1 cipher=RC4-SHA bits=128/128); Thu, 18 Apr 2013 19:08:12 -0700 (PDT) From: peter.crosthwaite@xilinx.com To: qemu-devel@nongnu.org Date: Fri, 19 Apr 2013 12:06:09 +1000 Message-Id: <21a23f60541923831d66318a1d40b354c51fcbc1.1366335998.git.peter.crosthwaite@xilinx.com> X-Mailer: git-send-email 1.7.0.4 In-Reply-To: References: X-Gm-Message-State: ALoCoQngyGyMcodAIV6uyerk7IZCLJjuor3VGxYTvJLkSEyR0sJLT+463OoWCBUV9rexZh1odh91 X-detected-operating-system: by eggs.gnu.org: Error: Malformed IPv6 address (bad octet value). X-Received-From: 2607:f8b0:400e:c00::22a Cc: peter.maydell@linaro.org Subject: [Qemu-devel] [PATCH for-1.5 v2 05/15] xilinx_spips: Fix QSPI FIFO size X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Peter Crosthwaite QSPI has a bigger FIFO than the regular SPI controller. Differentiate between the two with correct FIFO sizes for each. This is the first piece of class data for SPIPS, so this patch sees the creation of the XilinxSPIPSClass definition and assoicated QOM constructs. Signed-off-by: Peter Crosthwaite --- changed from v1: Reimplemented using class data (PMM review) hw/ssi/xilinx_spips.c | 27 +++++++++++++++++++++++++-- 1 files changed, 25 insertions(+), 2 deletions(-) diff --git a/hw/ssi/xilinx_spips.c b/hw/ssi/xilinx_spips.c index 29636ce..e351cb2 100644 --- a/hw/ssi/xilinx_spips.c +++ b/hw/ssi/xilinx_spips.c @@ -106,6 +106,9 @@ #define RXFF_A 32 #define TXFF_A 32 +#define RXFF_A_Q (64 * 4) +#define TXFF_A_Q (64 * 4) + /* 16MB per linear region */ #define LQSPI_ADDRESS_BITS 24 /* Bite off 4k chunks at a time */ @@ -159,12 +162,23 @@ typedef struct { hwaddr lqspi_cached_addr; } XilinxQSPIPS; +typedef struct XilinxSPIPSClass { + SysBusDeviceClass parent_class; + + uint32_t rx_fifo_size; + uint32_t tx_fifo_size; +} XilinxSPIPSClass; #define TYPE_XILINX_SPIPS "xlnx.ps7-spi" #define TYPE_XILINX_QSPIPS "xlnx.ps7-qspi" #define XILINX_SPIPS(obj) \ OBJECT_CHECK(XilinxSPIPS, (obj), TYPE_XILINX_SPIPS) +#define XILINX_SPIPS_CLASS(klass) \ + OBJECT_CLASS_CHECK(XilinxSPIPSClass, (klass), TYPE_XILINX_SPIPS) +#define XILINX_SPIPS_GET_CLASS(obj) \ + OBJECT_GET_CLASS(XilinxSPIPSClass, (obj), TYPE_XILINX_SPIPS) + #define XILINX_QSPIPS(obj) \ OBJECT_CHECK(XilinxQSPIPS, (obj), TYPE_XILINX_QSPIPS) @@ -531,6 +545,7 @@ static void xilinx_spips_realize(DeviceState *dev, Error **errp) { XilinxSPIPS *s = XILINX_SPIPS(dev); SysBusDevice *sbd = SYS_BUS_DEVICE(dev); + XilinxSPIPSClass *xsc = XILINX_SPIPS_GET_CLASS(s); int i; DB_PRINT("realized spips\n"); @@ -555,8 +570,8 @@ static void xilinx_spips_realize(DeviceState *dev, Error **errp) s->irqline = -1; - fifo8_create(&s->rx_fifo, RXFF_A); - fifo8_create(&s->tx_fifo, TXFF_A); + fifo8_create(&s->rx_fifo, xsc->rx_fifo_size); + fifo8_create(&s->tx_fifo, xsc->tx_fifo_size); } static void xilinx_qspips_realize(DeviceState *dev, Error **errp) @@ -611,18 +626,25 @@ static Property xilinx_spips_properties[] = { static void xilinx_qspips_class_init(ObjectClass *klass, void * data) { DeviceClass *dc = DEVICE_CLASS(klass); + XilinxSPIPSClass *xsc = XILINX_SPIPS_CLASS(klass); dc->realize = xilinx_qspips_realize; + xsc->rx_fifo_size = RXFF_A_Q; + xsc->tx_fifo_size = TXFF_A_Q; } static void xilinx_spips_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); + XilinxSPIPSClass *xsc = XILINX_SPIPS_CLASS(klass); dc->realize = xilinx_spips_realize; dc->reset = xilinx_spips_reset; dc->props = xilinx_spips_properties; dc->vmsd = &vmstate_xilinx_spips; + + xsc->rx_fifo_size = RXFF_A; + xsc->tx_fifo_size = TXFF_A; } static const TypeInfo xilinx_spips_info = { @@ -630,6 +652,7 @@ static const TypeInfo xilinx_spips_info = { .parent = TYPE_SYS_BUS_DEVICE, .instance_size = sizeof(XilinxSPIPS), .class_init = xilinx_spips_class_init, + .class_size = sizeof (XilinxSPIPSClass), }; static const TypeInfo xilinx_qspips_info = {