From patchwork Thu Apr 18 20:44:21 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vladimir Makarov X-Patchwork-Id: 237734 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "localhost", Issuer "www.qmailtoaster.com" (not verified)) by ozlabs.org (Postfix) with ESMTPS id 0590B2C0204 for ; Fri, 19 Apr 2013 06:56:07 +1000 (EST) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :message-id:date:from:mime-version:to:subject:references :in-reply-to:content-type; q=dns; s=default; b=a6CGsoTKSEwgy9rZ3 CRHl4wXdlJffbAYsa2GqcXVL8a3g8EVi0G+xlHuKHStgArX5Xa6Kd1Q+IIT1VBtm 4laxbuy/DbESCeq3I+Jx4no0M82SUKSdvkGAkvAlfLfkJy2Bbbow1iCStlelR3GO fvEK+pDLLEtEImeH0xaN0MkURs= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :message-id:date:from:mime-version:to:subject:references :in-reply-to:content-type; s=default; bh=l8WOdnyFXK2E1Xv3yQXAvbq 6tCk=; b=Qy+1mQPhdgRG/madu1f6f8r47AdOJfXcI52eW+nU/eldcCUXTbd8E4f Bv8j2eTpUbv1kR7Av9ww3e8FuN62+mq5Dp76miPC+nfNHP7gKX2XZZWC/Nj8wUCU vlE00bFKDFHSR7eHBCh4ZaqvWVavAa9LHUYCu7xXDvH8WNJPXmcw= Received: (qmail 16890 invoked by alias); 18 Apr 2013 20:56:01 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 16879 invoked by uid 89); 18 Apr 2013 20:56:00 -0000 X-Spam-SWARE-Status: No, score=-7.6 required=5.0 tests=AWL, BAYES_00, KHOP_RCVD_UNTRUST, KHOP_THREADED, RCVD_IN_DNSWL_HI, RCVD_IN_HOSTKARMA_W, RP_MATCHES_RCVD, SPF_HELO_PASS autolearn=ham version=3.3.1 Received: from mx1.redhat.com (HELO mx1.redhat.com) (209.132.183.28) by sourceware.org (qpsmtpd/0.84/v0.84-167-ge50287c) with ESMTP; Thu, 18 Apr 2013 20:56:00 +0000 Received: from int-mx01.intmail.prod.int.phx2.redhat.com (int-mx01.intmail.prod.int.phx2.redhat.com [10.5.11.11]) by mx1.redhat.com (8.14.4/8.14.4) with ESMTP id r3IKtwgR002239 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK); Thu, 18 Apr 2013 16:55:58 -0400 Received: from toll.usersys.redhat.com (toll.yyz.redhat.com [10.15.16.165]) by int-mx01.intmail.prod.int.phx2.redhat.com (8.13.8/8.13.8) with ESMTP id r3IKtvrM032203; Thu, 18 Apr 2013 16:55:57 -0400 Message-ID: <51705B25.6020402@redhat.com> Date: Thu, 18 Apr 2013 16:44:21 -0400 From: Vladimir Makarov User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:17.0) Gecko/20130311 Thunderbird/17.0.4 MIME-Version: 1.0 To: Michael Meissner , gcc-patches , David Edelsohn , "Bergner, Peter" , aavrunin@redhat.com Subject: Re: RFA: enable LRA for rs6000 [patch for WRF] References: <5166F34C.30901@redhat.com> <20130415224853.GA17643@ibm-tiger.the-meissners.org> <20130416225639.GA16621@ibm-tiger.the-meissners.org> <516EAE5D.4080601@redhat.com> <20130417161042.GA22186@ibm-tiger.the-meissners.org> In-Reply-To: <20130417161042.GA22186@ibm-tiger.the-meissners.org> X-Virus-Found: No On 04/17/2013 12:10 PM, Michael Meissner wrote: > On Wed, Apr 17, 2013 at 10:14:53AM -0400, Vladimir Makarov wrote: >> Mike, thanks for the patch and all the SPEC2006 data (which are >> very useful as I have no access to power machine which can be used >> for benchmarking). I guess that may be some benchmark scores are >> lower because of LRA lacks some micro-optimizations which reload >> implements through many power hooks (e.g. LRA does not use push >> reload). Although sometimes it is not a bad thing (e.g. LRA does >> not use SECONDARY_MEMORY_NEEDED_RTX which permits to reuse the >> stack slots for other useful things). > SECONDARY_MEMORY_NEEDED_RTX is needed for SDmode on machines before the power7, > where we need a larger stack slot to hold spilled SDmode values (power6 did not > have the LFIWZX instruction that is needed to load SDmode values into floating > point registers). Thanks for the info. >> In general I got impression that power7 is the most difficult port >> for LRA. If we manage to port it, LRA ports for other targets will >> be easier. > I dunno, has LRA been ported to the SH yet? Not yet. Sorry for be inaccurate. I meant 9 targets which I worked on to port LRA. >> I also reproduced bootstrap failure --with-cpu=power7 and I am going >> to work on this and after that on SPEC2006 you wrote about. > The bootstrap problem was in processing move whose operand was substituted by equiv. memory and the move needs secondary reload through a provided insn pattern. The equiv memory was not legitimate and it resulted in failure to generated the secondary reload insn. LRA can fix the wrong address but secondary reload was done before processing addresses. It could be fixed in rs6000.c code too but it is complicated and I found a better (and i think more right) solution by moving secondary reload generation after address processing. Here is the patch for your branch (patch for trunk is a bit different as some changes in affected code were done on trunk). 2013-04-18 Vladimir Makarov * lra-constraints.c (check_and_process_move): Move code for move cost check to simple_move_p. Remove equiv_substitution. (simple_move_p): New function. (curr_insn_transform): Use the new function. Move call of check_and_process_move after operand equiv substitution and address process. Tomorrow I am going to look at SPEC2006 dealII crash for 32-bit mode. Index: lra-constraints.c =================================================================== --- lra-constraints.c (revision 198028) +++ lra-constraints.c (working copy) @@ -887,14 +887,6 @@ check_and_process_move (bool *change_p, lra_assert (curr_insn_set != NULL_RTX); dreg = dest = SET_DEST (curr_insn_set); sreg = src = SET_SRC (curr_insn_set); - /* Quick check on the right move insn which does not need - reloads. */ - if ((dclass = get_op_class (dest)) != NO_REGS - && (sclass = get_op_class (src)) != NO_REGS - /* The backend guarantees that register moves of cost 2 never - need reloads. */ - && targetm.register_move_cost (GET_MODE (src), dclass, sclass) == 2) - return true; if (GET_CODE (dest) == SUBREG) dreg = SUBREG_REG (dest); if (GET_CODE (src) == SUBREG) @@ -902,7 +894,6 @@ check_and_process_move (bool *change_p, if (! REG_P (dreg) || ! REG_P (sreg)) return false; sclass = dclass = NO_REGS; - dreg = get_equiv_substitution (dreg); if (REG_P (dreg)) dclass = get_reg_class (REGNO (dreg)); if (dclass == ALL_REGS) @@ -916,7 +907,6 @@ check_and_process_move (bool *change_p, return false; sreg_mode = GET_MODE (sreg); old_sreg = sreg; - sreg = get_equiv_substitution (sreg); if (REG_P (sreg)) sclass = get_reg_class (REGNO (sreg)); if (sclass == ALL_REGS) @@ -2693,6 +2683,24 @@ emit_inc (enum reg_class new_rclass, rtx return result; } +/* Return true if the current move insn does not need processing as we + already know that it satisfies its constraints. */ +static bool +simple_move_p (void) +{ + rtx dest, src; + enum reg_class dclass, sclass; + + lra_assert (curr_insn_set != NULL_RTX); + dest = SET_DEST (curr_insn_set); + src = SET_SRC (curr_insn_set); + return ((dclass = get_op_class (dest)) != NO_REGS + && (sclass = get_op_class (src)) != NO_REGS + /* The backend guarantees that register moves of cost 2 + never need reloads. */ + && targetm.register_move_cost (GET_MODE (src), dclass, sclass) == 2); + } + /* Swap operands NOP and NOP + 1. */ static inline void swap_operands (int nop) @@ -2736,15 +2744,13 @@ curr_insn_transform (void) int max_regno_before; int reused_alternative_num; + curr_insn_set = single_set (curr_insn); + if (curr_insn_set != NULL_RTX && simple_move_p ()) + return false; + no_input_reloads_p = no_output_reloads_p = false; goal_alt_number = -1; - change_p = sec_mem_p = false; - curr_insn_set = single_set (curr_insn); - if (curr_insn_set != NULL_RTX - && check_and_process_move (&change_p, &sec_mem_p)) - return change_p; - /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads; neither are insns that SET cc0. Insns that use CC0 are not allowed to have any input reloads. */ @@ -2839,6 +2845,10 @@ curr_insn_transform (void) we chose previously may no longer be valid. */ lra_set_used_insn_alternative (curr_insn, -1); + if (curr_insn_set != NULL_RTX + && check_and_process_move (&change_p, &sec_mem_p)) + return change_p; + try_swapped: reused_alternative_num = curr_id->used_insn_alternative;