Patchwork [v2,1/8] net: sh-eth: Remove ifdef from definition of bit of EDSR and GECMR

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Submitter Nobuhiro Iwamatsu
Date April 18, 2013, 10:11 a.m.
Message ID <1366279869-23387-1-git-send-email-nobuhiro.iwamatsu.yj@renesas.com>
Download mbox | patch
Permalink /patch/237600/
State Changes Requested
Delegated to: David Miller
Headers show

Comments

Nobuhiro Iwamatsu - April 18, 2013, 10:11 a.m.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
---
 v2: no change.

 drivers/net/ethernet/renesas/sh_eth.h |    7 ++-----
 1 file changed, 2 insertions(+), 5 deletions(-)
Sergei Shtylyov - April 18, 2013, 2:50 p.m.
On 18-04-2013 14:11, Nobuhiro Iwamatsu wrote:

> Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>

    Step in the right direction.

> diff --git a/drivers/net/ethernet/renesas/sh_eth.h b/drivers/net/ethernet/renesas/sh_eth.h
> index 6f9a997..f86ea96 100644
> --- a/drivers/net/ethernet/renesas/sh_eth.h
> +++ b/drivers/net/ethernet/renesas/sh_eth.h
> @@ -166,19 +166,16 @@ enum {
>   /*
>    * Register's bits
>    */
> -#if defined(CONFIG_CPU_SUBTYPE_SH7734) || defined(CONFIG_CPU_SUBTYPE_SH7763) ||\
> -    defined(CONFIG_ARCH_R8A7740)
> -/* EDSR */
> +/* EDSR : sh7734, sh7764, sh7757 and r8a7740 only */

    Where sh7764 and sh7757 came from?

>   enum EDSR_BIT {
>   	EDSR_ENT = 0x01, EDSR_ENR = 0x02,
>   };
>   #define EDSR_ENALL (EDSR_ENT|EDSR_ENR)
>
> -/* GECMR */
> +/* GECMR : sh7734, sh7764 and r8a7740 only */

    Where sh7764 came from?

>   enum GECMR_BIT {
>   	GECMR_10 = 0x0, GECMR_100 = 0x04, GECMR_1000 = 0x01,
>   };
> -#endif

WBR, Sergei


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Nobuhiro Iwamatsu - May 7, 2013, 2:57 a.m.
Hi,

(2013/04/18 23:50), Sergei Shtylyov wrote:
> On 18-04-2013 14:11, Nobuhiro Iwamatsu wrote:
>
>> Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
>
> Step in the right direction.
>
>> diff --git a/drivers/net/ethernet/renesas/sh_eth.h b/drivers/net/ethernet/renesas/sh_eth.h
>> index 6f9a997..f86ea96 100644
>> --- a/drivers/net/ethernet/renesas/sh_eth.h
>> +++ b/drivers/net/ethernet/renesas/sh_eth.h
>> @@ -166,19 +166,16 @@ enum {
>> /*
>> * Register's bits
>> */
>> -#if defined(CONFIG_CPU_SUBTYPE_SH7734) || defined(CONFIG_CPU_SUBTYPE_SH7763) ||\
>> - defined(CONFIG_ARCH_R8A7740)
>> -/* EDSR */
>> +/* EDSR : sh7734, sh7764, sh7757 and r8a7740 only */
>
> Where sh7764 and sh7757 came from?

sh7764 is wrong. I will fix to sh7763.
sh7757 has this register. I will split to other patch about this.

>
>> enum EDSR_BIT {
>> EDSR_ENT = 0x01, EDSR_ENR = 0x02,
>> };
>> #define EDSR_ENALL (EDSR_ENT|EDSR_ENR)
>>
>> -/* GECMR */
>> +/* GECMR : sh7734, sh7764 and r8a7740 only */
>
> Where sh7764 came from?

This is same too. thanks.

>
>> enum GECMR_BIT {
>> GECMR_10 = 0x0, GECMR_100 = 0x04, GECMR_1000 = 0x01,
>> };
>> -#endif
>
> WBR, Sergei
>

Best regards,
   Nobuhiro

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Patch

diff --git a/drivers/net/ethernet/renesas/sh_eth.h b/drivers/net/ethernet/renesas/sh_eth.h
index 6f9a997..f86ea96 100644
--- a/drivers/net/ethernet/renesas/sh_eth.h
+++ b/drivers/net/ethernet/renesas/sh_eth.h
@@ -166,19 +166,16 @@  enum {
 /*
  * Register's bits
  */
-#if defined(CONFIG_CPU_SUBTYPE_SH7734) || defined(CONFIG_CPU_SUBTYPE_SH7763) ||\
-    defined(CONFIG_ARCH_R8A7740)
-/* EDSR */
+/* EDSR : sh7734, sh7764, sh7757 and r8a7740 only */
 enum EDSR_BIT {
 	EDSR_ENT = 0x01, EDSR_ENR = 0x02,
 };
 #define EDSR_ENALL (EDSR_ENT|EDSR_ENR)
 
-/* GECMR */
+/* GECMR : sh7734, sh7764 and r8a7740 only */
 enum GECMR_BIT {
 	GECMR_10 = 0x0, GECMR_100 = 0x04, GECMR_1000 = 0x01,
 };
-#endif
 
 /* EDMR */
 enum DMAC_M_BIT {