From patchwork Thu Apr 18 02:13:30 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Simon Glass X-Patchwork-Id: 237395 X-Patchwork-Delegate: sjg@chromium.org Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 123D02C0195 for ; Thu, 18 Apr 2013 12:15:42 +1000 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 6EC5C4A2A6; Thu, 18 Apr 2013 04:15:37 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id yidzQ4gF7aPA; Thu, 18 Apr 2013 04:15:37 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 249514A301; Thu, 18 Apr 2013 04:14:58 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 468614A23A for ; Thu, 18 Apr 2013 04:14:45 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id y3VFiIvE09Ga for ; Thu, 18 Apr 2013 04:14:43 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-vc0-f201.google.com (mail-vc0-f201.google.com [209.85.220.201]) by theia.denx.de (Postfix) with ESMTPS id AAF0A4A2D0 for ; Thu, 18 Apr 2013 04:14:34 +0200 (CEST) Received: by mail-vc0-f201.google.com with SMTP id hz11so236143vcb.4 for ; Wed, 17 Apr 2013 19:14:33 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-received:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references:mime-version:content-type:content-transfer-encoding :x-gm-message-state; bh=Pm8R7/BcDi6B8HJfei8CxgFiL2QPvCfCQvV+WX+ZubE=; b=C9+f8Nuk2xkqM8WsKR/FPN8T5EocgIV6H+1IWw0GSAnEUlcHvY2ZMfTaim+gsarJYN YaDQ6i9lxdu7f7u1CtEPBhby+8YGEUL0Asz8tUZNj75Ip54tERZkxu8fCeCAZARvniDH RHOc1YMsA9PYvMIBdb/XV2EVDzFjAFV1DSifmQb+EDnvnneNQDieuB1xDDlNzTXGM9eW 6DvvCqkEysj/LPx0hBBf+zLK1s4L3yIAQl2laVNDQ7acvA74krEyBZ36KHKfjfG7Kojp IyCD+hcbEWOmq+JrCEpcQLgHwVzMOdISdxeC4VEO7c6ylz0p50HOnGkb8giBo3K17aWd Q5/w== X-Received: by 10.236.189.241 with SMTP id c77mr126394yhn.28.1366251273400; Wed, 17 Apr 2013 19:14:33 -0700 (PDT) Received: from corp2gmr1-2.hot.corp.google.com (corp2gmr1-2.hot.corp.google.com [172.24.189.93]) by gmr-mx.google.com with ESMTPS id s80si1875038yhe.6.2013.04.17.19.14.33 (version=TLSv1.1 cipher=AES128-SHA bits=128/128); Wed, 17 Apr 2013 19:14:33 -0700 (PDT) Received: from kaka.mtv.corp.google.com (kaka.mtv.corp.google.com [172.22.83.1]) by corp2gmr1-2.hot.corp.google.com (Postfix) with ESMTP id 06B165AF881; Wed, 17 Apr 2013 19:14:10 -0700 (PDT) Received: by kaka.mtv.corp.google.com (Postfix, from userid 121222) id B2A041606B5; Wed, 17 Apr 2013 19:14:09 -0700 (PDT) From: Simon Glass To: U-Boot Mailing List Date: Wed, 17 Apr 2013 19:13:30 -0700 Message-Id: <1366251228-19884-2-git-send-email-sjg@chromium.org> X-Mailer: git-send-email 1.8.2.1 In-Reply-To: <1366251228-19884-1-git-send-email-sjg@chromium.org> References: <1366251228-19884-1-git-send-email-sjg@chromium.org> MIME-Version: 1.0 X-Gm-Message-State: ALoCoQlA+DdWO8qS3LRFfnj6of39DE48plH2qsM3UJV7FSDDsukDr/FomaAui5UHvLOyfO6kOCGO7BxKTp8N4lNe4tP5ZHaYznk//b+cKhtvzZ+/H/8vHQjCn5utz6ntL4uKYUaOivtYCbUWhVz6OsYVuVoE8JnXlFNdjRf+4/Lk6itytwDw5xAsbJky0YLQTvFj20JXOLCN Cc: Graeme Russ , u-boot-review@google.com Subject: [U-Boot] [PATCH 01/19] x86: Remove unused bios/pci code X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de Graeme Russ pointed out that this code is no longer used. Remove it. Signed-off-by: Simon Glass Acked-by: Graeme Russ --- arch/x86/include/asm/pci.h | 4 - arch/x86/lib/Makefile | 1 - arch/x86/lib/bios.h | 170 ---------------------------------------- arch/x86/lib/pci.c | 188 --------------------------------------------- 4 files changed, 363 deletions(-) delete mode 100644 arch/x86/lib/bios.h delete mode 100644 arch/x86/lib/pci.c diff --git a/arch/x86/include/asm/pci.h b/arch/x86/include/asm/pci.h index 6d68ab6..9cc2034 100644 --- a/arch/x86/include/asm/pci.h +++ b/arch/x86/include/asm/pci.h @@ -30,8 +30,4 @@ const struct pci_device_id _table[] void pci_setup_type1(struct pci_controller *hose); -int pci_enable_legacy_video_ports(struct pci_controller* hose); -int pci_shadow_rom(pci_dev_t dev, unsigned char *dest); -void pci_remove_rom_window(struct pci_controller* hose, u32 addr); -u32 pci_get_rom_window(struct pci_controller* hose, int size); #endif diff --git a/arch/x86/lib/Makefile b/arch/x86/lib/Makefile index ee89354..9c6b621 100644 --- a/arch/x86/lib/Makefile +++ b/arch/x86/lib/Makefile @@ -37,7 +37,6 @@ COBJS-y += init_wrappers.o COBJS-y += interrupts.o COBJS-$(CONFIG_SYS_PCAT_INTERRUPTS) += pcat_interrupts.o COBJS-$(CONFIG_SYS_GENERIC_TIMER) += pcat_timer.o -COBJS-$(CONFIG_PCI) += pci.o COBJS-$(CONFIG_PCI) += pci_type1.o COBJS-y += relocate.o COBJS-y += physmem.o diff --git a/arch/x86/lib/bios.h b/arch/x86/lib/bios.h deleted file mode 100644 index 96509b0..0000000 --- a/arch/x86/lib/bios.h +++ /dev/null @@ -1,170 +0,0 @@ -/* - * (C) Copyright 2002 - * Daniel Engström, Omicron Ceti AB, - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef _BIOS_H_ -#define _BIOS_H_ - -#define OFFS_ES 0 /* 16bit */ -#define OFFS_GS 2 /* 16bit */ -#define OFFS_DS 4 /* 16bit */ -#define OFFS_EDI 6 /* 32bit */ -#define OFFS_DI 6 /* low 16 bits of EDI */ -#define OFFS_ESI 10 /* 32bit */ -#define OFFS_SI 10 /* low 16 bits of ESI */ -#define OFFS_EBP 14 /* 32bit */ -#define OFFS_BP 14 /* low 16 bits of EBP */ -#define OFFS_ESP 18 /* 32bit */ -#define OFFS_SP 18 /* low 16 bits of ESP */ -#define OFFS_EBX 22 /* 32bit */ -#define OFFS_BX 22 /* low 16 bits of EBX */ -#define OFFS_BL 22 /* low 8 bits of BX */ -#define OFFS_BH 23 /* high 8 bits of BX */ -#define OFFS_EDX 26 /* 32bit */ -#define OFFS_DX 26 /* low 16 bits of EBX */ -#define OFFS_DL 26 /* low 8 bits of BX */ -#define OFFS_DH 27 /* high 8 bits of BX */ -#define OFFS_ECX 30 /* 32bit */ -#define OFFS_CX 30 /* low 16 bits of EBX */ -#define OFFS_CL 30 /* low 8 bits of BX */ -#define OFFS_CH 31 /* high 8 bits of BX */ -#define OFFS_EAX 34 /* 32bit */ -#define OFFS_AX 34 /* low 16 bits of EBX */ -#define OFFS_AL 34 /* low 8 bits of BX */ -#define OFFS_AH 35 /* high 8 bits of BX */ -#define OFFS_VECTOR 38 /* 16bit */ -#define OFFS_IP 40 /* 16bit */ -#define OFFS_CS 42 /* 16bit */ -#define OFFS_FLAGS 44 /* 16bit */ - -/* stack at 0x40:0x800 -> 0x800 */ -#define SEGMENT 0x40 -#define STACK 0x800 - -/* - * save general registers - * save some segments - * save callers stack segment - * setup BIOS segments - * setup BIOS stackpointer - */ -#define MAKE_BIOS_STACK \ - pushal; \ - pushw %ds; \ - pushw %gs; \ - pushw %es; \ - pushw %ss; \ - popw %gs; \ - movw $SEGMENT, %ax; \ - movw %ax, %ds; \ - movw %ax, %es; \ - movw %ax, %ss; \ - movw %sp, %bp; \ - movw $STACK, %sp - -/* - * restore callers stack segment - * restore some segments - * restore general registers - */ -#define RESTORE_CALLERS_STACK \ - pushw %gs; \ - popw %ss; \ - movw %bp, %sp; \ - popw %es; \ - popw %gs; \ - popw %ds; \ - popal - -#ifndef __ASSEMBLY__ -#define BIOS_DATA ((char *)0x400) -#define BIOS_DATA_SIZE 256 -#define BIOS_BASE ((char *)0xf0000) -#define BIOS_CS 0xf000 - -extern ulong __bios_start; -extern ulong __bios_size; - -/* these are defined in a 16bit segment and needs - * to be accessed with the RELOC_16_xxxx() macros below - */ -extern u16 ram_in_64kb_chunks; -extern u16 bios_equipment; -extern u8 pci_last_bus; - -extern void *rm_int00; -extern void *rm_int01; -extern void *rm_int02; -extern void *rm_int03; -extern void *rm_int04; -extern void *rm_int05; -extern void *rm_int06; -extern void *rm_int07; -extern void *rm_int08; -extern void *rm_int09; -extern void *rm_int0a; -extern void *rm_int0b; -extern void *rm_int0c; -extern void *rm_int0d; -extern void *rm_int0e; -extern void *rm_int0f; -extern void *rm_int10; -extern void *rm_int11; -extern void *rm_int12; -extern void *rm_int13; -extern void *rm_int14; -extern void *rm_int15; -extern void *rm_int16; -extern void *rm_int17; -extern void *rm_int18; -extern void *rm_int19; -extern void *rm_int1a; -extern void *rm_int1b; -extern void *rm_int1c; -extern void *rm_int1d; -extern void *rm_int1e; -extern void *rm_int1f; -extern void *rm_def_int; - -#define RELOC_16_LONG(seg, off) (*(u32 *)(seg << 4 | (u32)&off)) -#define RELOC_16_WORD(seg, off) (*(u16 *)(seg << 4 | (u32)&off)) -#define RELOC_16_BYTE(seg, off) (*(u8 *)(seg << 4 | (u32)&off)) - -#ifdef PCI_BIOS_DEBUG -extern u32 num_pci_bios_present; -extern u32 num_pci_bios_find_device; -extern u32 num_pci_bios_find_class; -extern u32 num_pci_bios_generate_special_cycle; -extern u32 num_pci_bios_read_cfg_byte; -extern u32 num_pci_bios_read_cfg_word; -extern u32 num_pci_bios_read_cfg_dword; -extern u32 num_pci_bios_write_cfg_byte; -extern u32 num_pci_bios_write_cfg_word; -extern u32 num_pci_bios_write_cfg_dword; -extern u32 num_pci_bios_get_irq_routing; -extern u32 num_pci_bios_set_irq; -extern u32 num_pci_bios_unknown_function; -#endif - -#endif - -#endif diff --git a/arch/x86/lib/pci.c b/arch/x86/lib/pci.c deleted file mode 100644 index 71878dd..0000000 --- a/arch/x86/lib/pci.c +++ /dev/null @@ -1,188 +0,0 @@ -/* - * (C) Copyright 2002 - * Daniel Engström, Omicron Ceti AB, - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include -#include -#include -#include - -#undef PCI_ROM_SCAN_VERBOSE - -int pci_shadow_rom(pci_dev_t dev, unsigned char *dest) -{ - struct pci_controller *hose; - int res = -1; - int i; - - u32 rom_addr; - u32 addr_reg; - u32 size; - - u16 vendor; - u16 device; - u32 class_code; - - u32 pci_data; - - hose = pci_bus_to_hose(PCI_BUS(dev)); - - debug("pci_shadow_rom() asked to shadow device %x to %x\n", - dev, (u32)dest); - - pci_read_config_word(dev, PCI_VENDOR_ID, &vendor); - pci_read_config_word(dev, PCI_DEVICE_ID, &device); - pci_read_config_dword(dev, PCI_CLASS_REVISION, &class_code); - - class_code &= 0xffffff00; - class_code >>= 8; - - debug("PCI Header Vendor %04x device %04x class %06x\n", - vendor, device, class_code); - - /* Enable the rom addess decoder */ - pci_write_config_dword(dev, PCI_ROM_ADDRESS, (u32)PCI_ROM_ADDRESS_MASK); - pci_read_config_dword(dev, PCI_ROM_ADDRESS, &addr_reg); - - if (!addr_reg) { - /* register unimplemented */ - printf("pci_chadow_rom: device do not seem to have a rom\n"); - return -1; - } - - size = (~(addr_reg&PCI_ROM_ADDRESS_MASK)) + 1; - - debug("ROM is %d bytes\n", size); - - rom_addr = pci_get_rom_window(hose, size); - - debug("ROM mapped at %x\n", rom_addr); - - pci_write_config_dword(dev, PCI_ROM_ADDRESS, - pci_phys_to_mem(dev, rom_addr) - |PCI_ROM_ADDRESS_ENABLE); - - - for (i = rom_addr; i < rom_addr + size; i += 512) { - if (readw(i) == 0xaa55) { -#ifdef PCI_ROM_SCAN_VERBOSE - printf("ROM signature found\n"); -#endif - pci_data = readw(0x18 + i); - pci_data += i; - - if (0 == memcmp((void *)pci_data, "PCIR", 4)) { -#ifdef PCI_ROM_SCAN_VERBOSE - printf("Fount PCI rom image at offset %d\n", - i - rom_addr); - printf("Vendor %04x device %04x class %06x\n", - readw(pci_data + 4), readw(pci_data + 6), - readl(pci_data + 0x0d) & 0xffffff); - printf("%s\n", - (readw(pci_data + 0x15) & 0x80) ? - "Last image" : "More images follow"); - switch (readb(pci_data + 0x14)) { - case 0: - printf("X86 code\n"); - break; - case 1: - printf("Openfirmware code\n"); - break; - case 2: - printf("PARISC code\n"); - break; - } - printf("Image size %d\n", - readw(pci_data + 0x10) * 512); -#endif - /* - * FixMe: I think we should compare the class - * code bytes as well but I have no reference - * on the exact order of these bytes in the PCI - * ROM header - */ - if (readw(pci_data + 4) == vendor && - readw(pci_data + 6) == device && - readb(pci_data + 0x14) == 0) { -#ifdef PCI_ROM_SCAN_VERBOSE - printf("Suitable ROM image found\n"); -#endif - memmove(dest, (void *)rom_addr, - readw(pci_data + 0x10) * 512); - res = 0; - break; - - } - - if (readw(pci_data + 0x15) & 0x80) - break; - } - } - - } - -#ifdef PCI_ROM_SCAN_VERBOSE - if (res) - printf("No suitable image found\n"); -#endif - /* disable PAR register and PCI device ROM address devocer */ - pci_remove_rom_window(hose, rom_addr); - - pci_write_config_dword(dev, PCI_ROM_ADDRESS, 0); - - return res; -} - -#ifdef PCI_BIOS_DEBUG - -void print_bios_bios_stat(void) -{ - printf("16 bit functions:\n"); - printf("pci_bios_present: %d\n", - RELOC_16_LONG(0xf000, num_pci_bios_present)); - printf("pci_bios_find_device: %d\n", - RELOC_16_LONG(0xf000, num_pci_bios_find_device)); - printf("pci_bios_find_class: %d\n", - RELOC_16_LONG(0xf000, num_pci_bios_find_class)); - printf("pci_bios_generate_special_cycle: %d\n", - RELOC_16_LONG(0xf000, - num_pci_bios_generate_special_cycle)); - printf("pci_bios_read_cfg_byte: %d\n", - RELOC_16_LONG(0xf000, num_pci_bios_read_cfg_byte)); - printf("pci_bios_read_cfg_word: %d\n", - RELOC_16_LONG(0xf000, num_pci_bios_read_cfg_word)); - printf("pci_bios_read_cfg_dword: %d\n", - RELOC_16_LONG(0xf000, num_pci_bios_read_cfg_dword)); - printf("pci_bios_write_cfg_byte: %d\n", - RELOC_16_LONG(0xf000, num_pci_bios_write_cfg_byte)); - printf("pci_bios_write_cfg_word: %d\n", - RELOC_16_LONG(0xf000, num_pci_bios_write_cfg_word)); - printf("pci_bios_write_cfg_dword: %d\n", - RELOC_16_LONG(0xf000, num_pci_bios_write_cfg_dword)); - printf("pci_bios_get_irq_routing: %d\n", - RELOC_16_LONG(0xf000, num_pci_bios_get_irq_routing)); - printf("pci_bios_set_irq: %d\n", - RELOC_16_LONG(0xf000, num_pci_bios_set_irq)); - printf("pci_bios_unknown_function: %d\n", - RELOC_16_LONG(0xf000, num_pci_bios_unknown_function)); -} -#endif