From patchwork Mon Apr 15 23:28:20 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tom Warren X-Patchwork-Id: 236769 X-Patchwork-Delegate: albert.aribaud@free.fr Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id A6CCE2C0040 for ; Tue, 16 Apr 2013 09:28:28 +1000 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id C2F624A1AC; Tue, 16 Apr 2013 01:28:26 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id aJYTpnQREEa2; Tue, 16 Apr 2013 01:28:26 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 267A94A1A0; Tue, 16 Apr 2013 01:28:25 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 5575F4A1A0 for ; Tue, 16 Apr 2013 01:28:23 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id R1OjdH6gQYGR for ; Tue, 16 Apr 2013 01:28:22 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-lb0-f180.google.com (mail-lb0-f180.google.com [209.85.217.180]) by theia.denx.de (Postfix) with ESMTPS id 498BF4A19B for ; Tue, 16 Apr 2013 01:28:20 +0200 (CEST) Received: by mail-lb0-f180.google.com with SMTP id t11so4965937lbi.25 for ; Mon, 15 Apr 2013 16:28:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=mime-version:x-received:date:message-id:subject:from:to:cc :content-type; bh=ZLw0HSv5EflDfvz43jy+aCLzy9Zw9SHDWxRjbITKIEA=; b=MI0EV8Lyz36WUXEEocE9/d2jCIBMX1l2B+o/gRMQ1G3PQdbXxpG/RdDz9IWcZtMPQl egal5iA0IaQ5BIMI14dvogAgLaUdC+VfUfdOQKJqr87NPZXsDiGGHbnsxzclbqewRDAv gtzJJkhJMdXY/7Shvx2cRAvF5j5BUjyBbX73HEpKpeMZUYa1hlKbZZRstikNxQwZmrzL vWg1eLcNbIfpf5AwJqZwxv9v8awdZz4m/kOigM1dXpq3BsklIgWKE/Sn3vudU8tAyTQV xzvx/LA6hpQWwOecDKF7oHj3Vj4nkUWJ5Mf+gRzsf4p1eBvnH1t4pt9jIqSJs7cfQZbk e0Hg== MIME-Version: 1.0 X-Received: by 10.112.199.230 with SMTP id jn6mr133499lbc.131.1366068500455; Mon, 15 Apr 2013 16:28:20 -0700 (PDT) Received: by 10.114.199.18 with HTTP; Mon, 15 Apr 2013 16:28:20 -0700 (PDT) Date: Mon, 15 Apr 2013 16:28:20 -0700 Message-ID: From: Tom Warren To: Albert ARIBAUD , "u-boot@lists.denx.de" X-Content-Filtered-By: Mailman/MimeDel 2.1.11 Cc: jimmzhang@nvidia.com, Tom Warren , Stephen Warren Subject: [U-Boot] pull request for u-boot-tegra/master into ARM/master X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de Albert, Please pull u-boot-tegra/master into ARM/master. Thanks! ./MAKEALL for all the Tegra boards is OK, running a ./MAKEALL -a arm now. tools/checkpatch.pl is clean. The following changes since commit c4a4e2e20ca226948b62ed116df98f7a3932f2ac: ARMv7: start.S: stay in HYP mode if u-boot is entered in it (2013-04-15 18:30:59 +0200) are available in the git repository at: git://git.denx.de/u-boot-tegra master for you to fetch changes up to 601795462a4e7ede97b64dc306de1002e688eef6: Tegra: T30: Beaver board support. (2013-04-15 16:13:51 -0700) ---------------------------------------------------------------- Stephen Warren (1): ARM: tegra: support T33 SKU of Tegra30 Thierry Reding (4): Tegra: All Tamonten-derived boards use onboard NAND Tegra: Medcom-Wide: Enable NAND and boot script support Tegra: Plutux: Enable NAND and boot script support Tegra: TEC: Enable boot script support Tom Warren (7): Tegra: enable verify support for the crc32 command Tegra: Restore cp15 VBAR _start vector write for ARMv7 Tegra: Configure L2 cache control reg properly. Tegra114: Initialize System Counter (TSC) with osc frequency Tegra: Fix MSELECT clock divisors for T30/T114. Tegra: Split tegra_get_chip_type() into soc & sku funcs Tegra: T30: Beaver board support. MAINTAINERS | 1 + arch/arm/cpu/arm720t/tegra-common/cpu.c | 48 +++++++++------- arch/arm/cpu/arm720t/tegra-common/cpu.h | 4 +- arch/arm/cpu/arm720t/tegra114/cpu.c | 10 ++-- arch/arm/cpu/arm720t/tegra30/cpu.c | 4 +- arch/arm/cpu/armv7/start.S | 2 - arch/arm/cpu/tegra-common/Makefile | 2 +- arch/arm/cpu/tegra-common/ap.c | 53 ++++++++++++------ arch/arm/cpu/tegra-common/cache.c | 48 ++++++++++++++++ arch/arm/cpu/tegra-common/clock.c | 3 + arch/arm/cpu/tegra114-common/clock.c | 22 ++++++++ arch/arm/cpu/tegra20-common/clock.c | 4 ++ arch/arm/cpu/tegra20-common/pmu.c | 4 +- arch/arm/cpu/tegra30-common/clock.c | 4 ++ arch/arm/include/asm/arch-tegra/ap.h | 21 ++++++- arch/arm/include/asm/arch-tegra/clock.h | 3 + arch/arm/include/asm/arch-tegra/tegra.h | 1 + arch/arm/include/asm/arch-tegra114/sysctr.h | 35 ++++++++++++ arch/arm/include/asm/arch-tegra114/tegra.h | 1 + board/avionic-design/dts/tegra20-tamonten.dtsi | 11 ++++ board/avionic-design/dts/tegra20-tec.dts | 11 ---- board/nvidia/common/emc.c | 2 +- board/nvidia/dts/tegra30-beaver.dts | 71 ++++++++++++++++++++++++ boards.cfg | 1 + include/configs/beaver.h | 76 ++++++++++++++++++++++++++ include/configs/medcom-wide.h | 21 ++++--- include/configs/plutux.h | 18 +++--- include/configs/tec.h | 10 +--- include/configs/tegra-common.h | 2 + 29 files changed, 404 insertions(+), 89 deletions(-) create mode 100644 arch/arm/cpu/tegra-common/cache.c create mode 100644 arch/arm/include/asm/arch-tegra114/sysctr.h create mode 100644 board/nvidia/dts/tegra30-beaver.dts create mode 100644 include/configs/beaver.h