From patchwork Mon Apr 15 07:31:44 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lucas Stach X-Patchwork-Id: 236507 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id C81522C0191 for ; Mon, 15 Apr 2013 17:32:10 +1000 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754060Ab3DOHbz (ORCPT ); Mon, 15 Apr 2013 03:31:55 -0400 Received: from ns.km20343-01.keymachine.de ([84.19.182.79]:41660 "EHLO km20343-01.keymachine.de" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1750746Ab3DOHby (ORCPT ); Mon, 15 Apr 2013 03:31:54 -0400 Received: from antimon.pengutronix.de (port-212-202-120-50.static.qsc.de [212.202.120.50]) by km20343-01.keymachine.de (Postfix) with ESMTPA id 1F4197D416E; Mon, 15 Apr 2013 09:31:51 +0200 (CEST) From: Lucas Stach To: Stephen Warren Cc: "linux-tegra@vger.kernel.org" , Peter De Schrijver , "mturquette@linaro.org" Subject: [PATCH resend 1/2] clk: tegra: remove USB from clk init table Date: Mon, 15 Apr 2013 09:31:44 +0200 Message-Id: <1366011105-2351-1-git-send-email-dev@lynxeye.de> X-Mailer: git-send-email 1.8.1.4 Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org The USB clocks are just clock gates, so no need to set a specific clock. In fact trying to set a specific clock is just a NOP if the requested clockrate is the same as those of the parent (clk_m) or will trigger a WARN_ON() if rates don't match up. As we are not setting a specific rate, nor activating the clocks at init, there is no point in keeping the the usb entries in the clock init table. Signed-off-by: Lucas Stach Acked-By: Peter De Schrijver Reviewed-by: Prashant Gaikwad Acked-by: Stephen Warren Tested-by: Stephen Warren Acked-by: Mike Turquette --- Trace produced by system with 13MHz clk_m: tegra_init_from_table: Failed to set rate 12000000 of usbd ------------[ cut here ]------------ WARNING: at drivers/clk/tegra/clk.c:64 tegra_init_from_table+0xc0/0x158() Modules linked in: [] (unwind_backtrace+0x0/0xf8) from [](warn_slowpath_common+0x4c/0x64) [] (warn_slowpath_common+0x4c/0x64) from [] (warn_slowpath_null+0x1c/0x24) [] (warn_slowpath_null+0x1c/0x24) from [] (tegra_init_from_table+0xc0/0x158) [] (tegra_init_from_table+0xc0/0x158) from [] (tegra20_clock_init+0x1398/0x13d4) [] (tegra20_clock_init+0x1398/0x13d4) from [] (of_clk_init+0x30/0x58) [] (of_clk_init+0x30/0x58) from [] (tegra_dt_init_irq+0x8/0x1c) [] (tegra_dt_init_irq+0x8/0x1c) from [] (init_IRQ+0x14/0x1c) [] (init_IRQ+0x14/0x1c) from [] (start_kernel+0x1a0/0x2f8) [] (start_kernel+0x1a0/0x2f8) from [<0000807c>] (0x807c) ---[ end trace 1b75b31a2719ed1c ]--- --- drivers/clk/tegra/clk-tegra20.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/drivers/clk/tegra/clk-tegra20.c b/drivers/clk/tegra/clk-tegra20.c index f873dce..a73278f 100644 --- a/drivers/clk/tegra/clk-tegra20.c +++ b/drivers/clk/tegra/clk-tegra20.c @@ -1259,9 +1259,6 @@ static __initdata struct tegra_clk_init_table init_table[] = { {uartc, pll_p, 0, 0}, {uartd, pll_p, 0, 0}, {uarte, pll_p, 0, 0}, - {usbd, clk_max, 12000000, 0}, - {usb2, clk_max, 12000000, 0}, - {usb3, clk_max, 12000000, 0}, {pll_a, clk_max, 56448000, 1}, {pll_a_out0, clk_max, 11289600, 1}, {cdev1, clk_max, 0, 1},