Message ID | CAGWvnymjxjOqzdQONVotfYZ30L0uxYV0PnOT=pDwwGR+F-47Kw@mail.gmail.com |
---|---|
State | New |
Headers | show |
On Sat, Apr 13, 2013 at 03:48:13PM -0400, David Edelsohn wrote: > V2DI mode is allowed in GPRs and the pattern predicate allows easy > vector constants but the pattern in vsx.md does not provide an > alternative for that case, which can lead to an ICE where the insn > does not satisfy its constraints. The following patch adds an > alternative for this case. > > I also noticed that the VSX movti_64bit pattern does not handle > loading constants into a GPR. > > And both the movti_64bit and movti_32bit patterns use j->wa instead of > O->wa. The "j" constraint will work because it will accept any mode, > but I think that an "O" constraint is more accurate for a scalar mode > like TImode. > > Because the failure depends on the details of register allocation, I > do not have a short testcase. > > Comments? This looks right. Too bad we probably can't combine j/O constraints, due to them being used in asm.
Index: vsx.md =================================================================== --- vsx.md (revision 197940) +++ vsx.md (working copy) @@ -207,8 +207,8 @@ ;; VSX moves (define_insn "*vsx_mov<mode>" - [(set (match_operand:VSX_M 0 "nonimmediate_operand" "=Z,<VSr>,<VSr>,?Z,?wa,?wa,*Y,*r,*r,<VSr>,?wa,v,wZ,v") - (match_operand:VSX_M 1 "input_operand" "<VSr>,Z,<VSr>,wa,Z,wa,r,Y,r,j,j,W,v,wZ"))] + [(set (match_operand:VSX_M 0 "nonimmediate_operand" "=Z,<VSr>,<VSr>,?Z,?wa,?wa,*Y,*r,*r,<VSr>,?wa,*r,v,wZ,v") + (match_operand:VSX_M 1 "input_operand"