From patchwork Wed Apr 10 08:32:44 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Ellerman X-Patchwork-Id: 235340 X-Patchwork-Delegate: michael@ellerman.id.au Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from ozlabs.org (localhost [IPv6:::1]) by ozlabs.org (Postfix) with ESMTP id BE8502C0181 for ; Wed, 10 Apr 2013 18:34:33 +1000 (EST) Received: by ozlabs.org (Postfix) id 3A1532C00F5; Wed, 10 Apr 2013 18:32:55 +1000 (EST) Delivered-To: linuxppc-dev@ozlabs.org Received: by ozlabs.org (Postfix, from userid 1034) id 369152C00F1; Wed, 10 Apr 2013 18:32:55 +1000 (EST) From: Michael Ellerman To: Subject: [PATCH 3/4] powerpc/perf: Add regs_no_sipr() Date: Wed, 10 Apr 2013 18:32:44 +1000 Message-Id: <1365582765-6939-3-git-send-email-michael@ellerman.id.au> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1365582765-6939-1-git-send-email-michael@ellerman.id.au> References: <1365582765-6939-1-git-send-email-michael@ellerman.id.au> Cc: sukadev@linux.vnet.ibm.com, Paul Mackerras X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" From: Michael Ellerman On power8 the presence or absence of SIPR depends on settings at runtime, so convert to using a dynamic flag for NO_SIPR. Existing backends that set NO_SIPR unconditionally set the dynamic flag obviously. Signed-off-by: Michael Ellerman --- arch/powerpc/perf/core-book3s.c | 15 ++++++++++++--- 1 file changed, 12 insertions(+), 3 deletions(-) diff --git a/arch/powerpc/perf/core-book3s.c b/arch/powerpc/perf/core-book3s.c index 770f359..4255b12 100644 --- a/arch/powerpc/perf/core-book3s.c +++ b/arch/powerpc/perf/core-book3s.c @@ -137,6 +137,11 @@ static bool regs_use_siar(struct pt_regs *regs) return !!(regs->result & 1); } +static bool regs_no_sipr(struct pt_regs *regs) +{ + return !!(regs->result & 2); +} + static inline u32 perf_flags_from_msr(struct pt_regs *regs) { if (regs->msr & MSR_PR) @@ -159,7 +164,7 @@ static inline u32 perf_get_misc_flags(struct pt_regs *regs) * SIAR which should give slightly more reliable * results */ - if (ppmu->flags & PPMU_NO_SIPR) { + if (regs_no_sipr(regs)) { unsigned long siar = mfspr(SPRN_SIAR); if (siar >= PAGE_OFFSET) return PERF_RECORD_MISC_KERNEL; @@ -189,6 +194,10 @@ static inline void perf_read_regs(struct pt_regs *regs) int use_siar; regs->dsisr = mmcra; + regs->result = 0; + + if (ppmu->flags & PPMU_NO_SIPR) + regs->result |= 2; /* * If this isn't a PMU exception (eg a software event) the SIAR is @@ -213,12 +222,12 @@ static inline void perf_read_regs(struct pt_regs *regs) use_siar = 1; else if ((ppmu->flags & PPMU_NO_CONT_SAMPLING)) use_siar = 0; - else if (!(ppmu->flags & PPMU_NO_SIPR) && regs_sipr(regs)) + else if (!regs_no_sipr(regs) && regs_sipr(regs)) use_siar = 0; else use_siar = 1; - regs->result = use_siar; + regs->result |= use_siar; } /*