From patchwork Tue Apr 9 15:19:34 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shawn Guo X-Patchwork-Id: 235113 Return-Path: X-Original-To: incoming-imx@patchwork.ozlabs.org Delivered-To: patchwork-incoming-imx@bilbo.ozlabs.org Received: from casper.infradead.org (casper.infradead.org [IPv6:2001:770:15f::2]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 789632C009C for ; Wed, 10 Apr 2013 01:21:13 +1000 (EST) Received: from merlin.infradead.org ([205.233.59.134]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1UPaL6-00022M-Mk; Tue, 09 Apr 2013 15:20:04 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1UPaKy-0005rx-2c; Tue, 09 Apr 2013 15:19:56 +0000 Received: from co1ehsobe001.messaging.microsoft.com ([216.32.180.184] helo=co1outboundpool.messaging.microsoft.com) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1UPaKb-0005qU-VP for linux-arm-kernel@lists.infradead.org; Tue, 09 Apr 2013 15:19:36 +0000 Received: from mail123-co1-R.bigfish.com (10.243.78.228) by CO1EHSOBE028.bigfish.com (10.243.66.91) with Microsoft SMTP Server id 14.1.225.23; Tue, 9 Apr 2013 15:19:33 +0000 Received: from mail123-co1 (localhost [127.0.0.1]) by mail123-co1-R.bigfish.com (Postfix) with ESMTP id 1A6E32000AA; Tue, 9 Apr 2013 15:19:33 +0000 (UTC) X-Forefront-Antispam-Report: CIP:70.37.183.190; KIP:(null); UIP:(null); IPV:NLI; H:mail.freescale.net; RD:none; EFVD:NLI X-SpamScore: 0 X-BigFish: VS0(z551biz936eIzz1f42h1fc6h1ee6h1de0h1fdah1202h1e76h1d1ah1d2ahzz8275dhz2dh87h2a8h668h839hd24he5bhf0ah1288h12a5h12a9h12bdh12e5h137ah139eh13b6h1441h1504h1537h162dh1631h1758h1898h18e1h1946h19b5h1ad9h1b0ah1155h) X-FB-DOMAIN-IP-MATCH: fail Received: from mail123-co1 (localhost.localdomain [127.0.0.1]) by mail123-co1 (MessageSwitch) id 1365520770261282_11571; Tue, 9 Apr 2013 15:19:30 +0000 (UTC) Received: from CO1EHSMHS026.bigfish.com (unknown [10.243.78.253]) by mail123-co1.bigfish.com (Postfix) with ESMTP id 36132600AD0; Tue, 9 Apr 2013 15:19:30 +0000 (UTC) Received: from mail.freescale.net (70.37.183.190) by CO1EHSMHS026.bigfish.com (10.243.66.36) with Microsoft SMTP Server (TLS) id 14.1.225.23; Tue, 9 Apr 2013 15:19:29 +0000 Received: from tx30smr01.am.freescale.net (10.81.153.31) by 039-SN1MMR1-002.039d.mgd.msft.net (10.84.1.15) with Microsoft SMTP Server (TLS) id 14.2.328.11; Tue, 9 Apr 2013 15:19:27 +0000 Received: from S2101-09.ap.freescale.net ([10.192.185.134]) by tx30smr01.am.freescale.net (8.14.3/8.14.0) with ESMTP id r39FJJcc003207; Tue, 9 Apr 2013 08:19:25 -0700 From: Shawn Guo To: Subject: [GIT PULL 3/4] ARM: imx: soc changes for 3.10 Date: Tue, 9 Apr 2013 23:19:34 +0800 Message-ID: <1365520775-28478-3-git-send-email-shawn.guo@linaro.org> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1365520775-28478-1-git-send-email-shawn.guo@linaro.org> References: <1365520775-28478-1-git-send-email-shawn.guo@linaro.org> MIME-Version: 1.0 X-OriginatorOrg: sigmatel.com X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130409_111934_322904_7808DFF8 X-CRM114-Status: GOOD ( 11.70 ) X-Spam-Score: -2.6 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.6 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [216.32.180.184 listed in list.dnswl.org] -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: Sascha Hauer , Shawn Guo , linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org List-Id: linux-imx-kernel.lists.patchwork.ozlabs.org Hi Arnd, Olof, It's based on imx-cleanup-3.10 and Philipp Zabel's "Reset controller API" pull request to resolve dependency and conflicts. There will still be one trivial conflict with your clksrc/cleanup branch. My for-next branch contains the resolution. Shawn The following changes since commit a86a36ef05484eea7144bbf06e2194c831c325de: Merge remote-tracking branch 'pza/reset/for_v3.10' into imx/soc (2013-04-09 21:50:50 +0800) are available in the git repository at: git://git.linaro.org/people/shawnguo/linux-2.6.git tags/imx-soc-3.10 for you to fetch changes up to 723bf2b0844f1d2435b8ffa4e706962a6a852179: ARM i.MX53: set CLK_SET_RATE_PARENT flag on the tve_ext_sel clock (2013-04-09 21:52:14 +0800) ---------------------------------------------------------------- The imx soc changes for 3.10: * Enable anatop, well bisa and RBC for suspend to optimize the power consumption a little bit * Clock changes for TVE, LDB, PATA, SRTC support * Add System Reset Controller (SRC) support for imx5 and imx6 * Add initial imx6dl support based on imx6q code * Kconfig for cpufreq-cpu0, defconfig updates and few other changes ---------------------------------------------------------------- Anson Huang (3): ARM: imx: enable anatop suspend/resume ARM: imx: enable periphery well bias for suspend ARM: imx: enable RBC to support anatop LPM mode Fabio Estevam (3): ARM: mach-imx: anatop: Include "common.h" ARM: imx_v6_v7_defconfig: Select CONFIG_PERF_EVENTS ARM: imx_v4_v5_defconfig: Add CONFIG_GPIO_SYSFS Gwenhael Goavec-Merou (1): ARM: imx1: mm: add call to mxc_device_init Markus Pargmann (1): ARM: imx27, imx5: Add kconfig selects for cpufreq-cpu0 Martin Fuzzey (1): ARM: i.MX53 Add the cko1, cko2 clock outputs. Philipp Zabel (14): ARM i.MX53: Add GPU clocks to clock tree ARM i.MX6q: export imx6q_revision ARM i.MX: Add imx_clk_divider_flags and imx_clk_mux_flags ARM i.MX53: fix ldb di divider and selector clocks ARM i.MX6q: fix ldb di divider and selector clocks ARM i.MX6q: Add audio/video PLL post dividers for i.MX6q rev 1.1 ARM i.MX6q: set the LDB serial clock parent to the video PLL ARM i.MX6q: Add GPU, VPU, IPU, and OpenVG resets to System Reset Controller (SRC) staging: drm/imx: Use SRC to reset IPU ARM i.MX5: Remove tve_sel clock from i.MX53 clock tree ARM i.MX53: Remove unused tve_gate clkdev entry ARM i.MX53: make tve_ext_sel propagate rate change to PLL ARM i.MX53: tve_di clock is not part of the CCM, but of TVE ARM i.MX53: set CLK_SET_RATE_PARENT flag on the tve_ext_sel clock Sascha Hauer (1): ARM: i.MX5: Add PATA and SRTC clocks Shawn Guo (3): ARM: imx: do not use regmap_read for ANADIG_DIGPROG ARM: imx: add initial imx6dl support ARM: imx: do not bring up unavailable cores .../devicetree/bindings/clock/imx5-clock.txt | 14 ++- .../devicetree/bindings/clock/imx6q-clock.txt | 3 + .../devicetree/bindings/reset/fsl,imx-src.txt | 49 ++++++++ .../bindings/staging/imx-drm/fsl-imx-drm.txt | 3 + arch/arm/Kconfig.debug | 4 +- arch/arm/configs/imx_v4_v5_defconfig | 1 + arch/arm/configs/imx_v6_v7_defconfig | 1 + arch/arm/mach-imx/Kconfig | 10 +- arch/arm/mach-imx/Makefile | 1 + arch/arm/mach-imx/anatop.c | 103 ++++++++++++++++ arch/arm/mach-imx/clk-imx51-imx53.c | 75 +++++++++--- arch/arm/mach-imx/clk-imx6q.c | 128 ++++++++++++++++++-- arch/arm/mach-imx/clk.h | 17 +++ arch/arm/mach-imx/common.h | 10 +- arch/arm/mach-imx/gpc.c | 23 +++- arch/arm/mach-imx/mach-imx6q.c | 74 ++++------- arch/arm/mach-imx/mm-imx1.c | 2 + arch/arm/mach-imx/mxc.h | 11 ++ arch/arm/mach-imx/platsmp.c | 4 +- arch/arm/mach-imx/pm-imx6q.c | 4 +- arch/arm/mach-imx/src.c | 65 ++++++++++ drivers/staging/imx-drm/ipu-v3/ipu-common.c | 12 +- 22 files changed, 525 insertions(+), 89 deletions(-) create mode 100644 Documentation/devicetree/bindings/reset/fsl,imx-src.txt create mode 100644 arch/arm/mach-imx/anatop.c