From patchwork Sat Apr 6 13:15:07 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fabio Estevam X-Patchwork-Id: 234431 X-Patchwork-Delegate: sbabic@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id B64F52C0116 for ; Sun, 7 Apr 2013 00:15:27 +1100 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id C7DC84A287; Sat, 6 Apr 2013 15:15:25 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 67tsO6jRSZTn; Sat, 6 Apr 2013 15:15:25 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 4C4254A27F; Sat, 6 Apr 2013 15:15:23 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 105954A27F for ; Sat, 6 Apr 2013 15:15:21 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id clnjRw-a+zbm for ; Sat, 6 Apr 2013 15:15:20 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-gg0-f182.google.com (mail-gg0-f182.google.com [209.85.161.182]) by theia.denx.de (Postfix) with ESMTPS id 0F7D34A27E for ; Sat, 6 Apr 2013 15:15:18 +0200 (CEST) Received: by mail-gg0-f182.google.com with SMTP id u2so720738ggn.13 for ; Sat, 06 Apr 2013 06:15:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=x-received:from:to:cc:subject:date:message-id:x-mailer; bh=jzXbF+QFhvahFgSvJbKEgv3SWf6/JUV8Zi04kZfXs2I=; b=EkzgagH8dQNh7O4wZoaOzy/U/cCK62mIlLHWXABM7RTQISwV+aiBayvjFSbgsVBid9 PwAKbvNySpvNDKLurxe2/3KsacH2wEU84tHjz8NVW5C9kK/jTdjwj8iyLvrOlcx2RWVw ahV70SbDjZjHNIE5ICs7PZrz1nkwiyWXsgpXUNif/x9TJS1UBuiQezsjuoZ7MQB2ZkLD 4N8kDj8n5NXKyx1vjGezCvkH/8zYfzqOMPOyjlKqMG1dUMBMi+RuLHCeAAxY862lj1x1 x3pUw8L5BHioPrT5fod8OZw2lPNim4NDqgIzPi24GsKVTA0iemvF+fXPhI02HghjGkwi j8uw== X-Received: by 10.236.1.197 with SMTP id 45mr8275482yhd.102.1365254116202; Sat, 06 Apr 2013 06:15:16 -0700 (PDT) Received: from localhost.localdomain ([187.64.220.204]) by mx.google.com with ESMTPS id s10sm827418yho.13.2013.04.06.06.15.14 (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Sat, 06 Apr 2013 06:15:15 -0700 (PDT) From: Fabio Estevam To: sbabic@denx.de Date: Sat, 6 Apr 2013 10:15:07 -0300 Message-Id: <1365254107-22448-1-git-send-email-festevam@gmail.com> X-Mailer: git-send-email 1.7.9.5 Cc: Fabio Estevam , u-boot@lists.denx.de, dirk.behme@de.bosch.com Subject: [U-Boot] [PATCH] spi: mxc_spi: Set master mode for all channels X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de From: Fabio Estevam The glitch in the SPI clock line, which commit 3cea335c34 (spi: mxc_spi: Fix spi clock glitch durant reset) solved, is back now and itwas re-introduced by commit d36b39bf0d (spi: mxc_spi: Fix ECSPI reset handling). Actually the glitch is happening due to always toggling between slave mode and master mode by configuring the CHANNEL_MODE bits in this reset function. Since the spi driver only supports master mode, set the mode for all channels always to master mode in order to have a stable, "glitch-free" SPI clock line. Signed-off-by: Fabio Estevam --- drivers/spi/mxc_spi.c | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-) diff --git a/drivers/spi/mxc_spi.c b/drivers/spi/mxc_spi.c index 4c19e0b..9eb2bce 100644 --- a/drivers/spi/mxc_spi.c +++ b/drivers/spi/mxc_spi.c @@ -137,9 +137,14 @@ static s32 spi_cfg_mxc(struct mxc_spi_slave *mxcs, unsigned int cs, return -1; } - /* Reset spi */ - reg_write(®s->ctrl, 0); - reg_write(®s->ctrl, MXC_CSPICTRL_EN); + /* + * Reset SPI and set all CSs to master mode, if toggling + * between slave and master mode we might see a glitch + * on the clock line + */ + reg_write(®s->ctrl, 0x000000F0); + reg_ctrl = reg_read(®s->ctrl); + reg_write(®s->ctrl, reg_ctrl | MXC_CSPICTRL_EN); reg_ctrl = reg_read(®s->ctrl);