[U-Boot,v2] powerpc/mpc85xx: Clear L1 D-cache lock

Message ID 1365203233-30788-1-git-send-email-yorksun@freescale.com
State Accepted, archived
Delegated to: Andy Fleming
Headers show

Commit Message

York Sun April 5, 2013, 11:07 p.m.
dcbi instruction has been used to clear D-cache lock. However, the cache
lock is persistent for e6500 core. Use dcblc to clear the lock explicitly.

Signed-off-by: York Sun <yorksun@freescale.com>
Change since v1: fix typo s/presistent/persistent/

 arch/powerpc/cpu/mpc85xx/start.S |    1 +
 1 file changed, 1 insertion(+)


diff --git a/arch/powerpc/cpu/mpc85xx/start.S b/arch/powerpc/cpu/mpc85xx/start.S
index 4acfeb4..481b6f6 100644
--- a/arch/powerpc/cpu/mpc85xx/start.S
+++ b/arch/powerpc/cpu/mpc85xx/start.S
@@ -2045,6 +2045,7 @@  unlock_ram_in_cache:
 	slwi	r4,r4,(10 - 1 - L1_CACHE_SHIFT)
 	mtctr	r4
 1:	dcbi	r0,r3
+	dcblc	r0,r3
 	bdnz	1b