Patchwork [U-Boot] powerpc/mpc85xx: Clear L1 D-cache lock

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Submitter York Sun
Date April 5, 2013, 8:17 p.m.
Message ID <1365193024-11701-1-git-send-email-yorksun@freescale.com>
Download mbox | patch
Permalink /patch/234272/
State Superseded
Headers show

Comments

York Sun - April 5, 2013, 8:17 p.m.
dcbi instruction has been used to clear D-cache lock. However, the cache
lock is presistent for e6500 core. Use dcblc to clear the lock explicitly.

Signed-off-by: York Sun <yorksun@freescale.com>
---
 arch/powerpc/cpu/mpc85xx/start.S |    1 +
 1 file changed, 1 insertion(+)
Wolfgang Denk - April 5, 2013, 10:11 p.m.
Dear York Sun,

In message <1365193024-11701-1-git-send-email-yorksun@freescale.com> you wrote:
> dcbi instruction has been used to clear D-cache lock. However, the cache
> lock is presistent for e6500 core. Use dcblc to clear the lock explicitly.

s/presistent/persistent/  ?

Best regards,

Wolfgang Denk

Patch

diff --git a/arch/powerpc/cpu/mpc85xx/start.S b/arch/powerpc/cpu/mpc85xx/start.S
index 9359d83..bb568a2 100644
--- a/arch/powerpc/cpu/mpc85xx/start.S
+++ b/arch/powerpc/cpu/mpc85xx/start.S
@@ -2049,6 +2049,7 @@  unlock_ram_in_cache:
 	slwi	r4,r4,(10 - 1 - L1_CACHE_SHIFT)
 	mtctr	r4
 1:	dcbi	r0,r3
+	dcblc	r0,r3
 	addi	r3,r3,CONFIG_SYS_CACHELINE_SIZE
 	bdnz	1b
 	sync