Patchwork [U-Boot,PATCHv2,1/2] Add DDR3 support for IGEP COM AQUILA/CYGNUS.

login
register
mail settings
Submitter Enric Balletbo i Serra
Date April 5, 2013, 8:27 a.m.
Message ID <1365150478-24104-2-git-send-email-eballetbo@iseebcn.com>
Download mbox | patch
Permalink /patch/234063/
State Accepted
Delegated to: Tom Rini
Headers show

Comments

Enric Balletbo i Serra - April 5, 2013, 8:27 a.m.
These boards uses Samsung K4B2G1646E-BIH9 a 2Gb E-die DDR3 SDRAM.

Signed-off-by: Enric Balletbo i Serra <eballetbo@iseebcn.com>
---
 arch/arm/include/asm/arch-am33xx/ddr_defs.h |   17 +++++++++++++++++
 1 file changed, 17 insertions(+)
Tom Rini - April 29, 2013, 8:21 p.m.
On Thu, Apr 04, 2013 at 10:27:57PM -0000, Enric Balletbo i Serra wrote:

> These boards uses Samsung K4B2G1646E-BIH9 a 2Gb E-die DDR3 SDRAM.
> 
> Signed-off-by: Enric Balletbo i Serra <eballetbo@iseebcn.com>

Along with 2/2, applied to u-boot-ti/master, thanks!

Patch

diff --git a/arch/arm/include/asm/arch-am33xx/ddr_defs.h b/arch/arm/include/asm/arch-am33xx/ddr_defs.h
index 260cc34..4ebc557 100644
--- a/arch/arm/include/asm/arch-am33xx/ddr_defs.h
+++ b/arch/arm/include/asm/arch-am33xx/ddr_defs.h
@@ -117,6 +117,23 @@ 
 #define MT41J512M8RH125_PHY_WR_DATA		0x74
 #define MT41J512M8RH125_IOCTRL_VALUE		0x18B
 
+/* Samsung K4B2G1646E-BIH9 */
+#define K4B2G1646EBIH9_EMIF_READ_LATENCY	0x06
+#define K4B2G1646EBIH9_EMIF_TIM1		0x0888A39B
+#define K4B2G1646EBIH9_EMIF_TIM2		0x2A04011A
+#define K4B2G1646EBIH9_EMIF_TIM3		0x501F820F
+#define K4B2G1646EBIH9_EMIF_SDCFG		0x61C24AB2
+#define K4B2G1646EBIH9_EMIF_SDREF		0x0000093B
+#define K4B2G1646EBIH9_ZQ_CFG			0x50074BE4
+#define K4B2G1646EBIH9_DLL_LOCK_DIFF		0x1
+#define K4B2G1646EBIH9_RATIO			0x40
+#define K4B2G1646EBIH9_INVERT_CLKOUT		0x1
+#define K4B2G1646EBIH9_RD_DQS			0x3B
+#define K4B2G1646EBIH9_WR_DQS			0x85
+#define K4B2G1646EBIH9_PHY_FIFO_WE		0x100
+#define K4B2G1646EBIH9_PHY_WR_DATA		0xC1
+#define K4B2G1646EBIH9_IOCTRL_VALUE		0x18B
+
 /**
  * Configure DMM
  */