From patchwork Fri Apr 5 06:33:51 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shaveta Leekha X-Patchwork-Id: 234048 X-Patchwork-Delegate: galak@kernel.crashing.org Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from ozlabs.org (localhost [IPv6:::1]) by ozlabs.org (Postfix) with ESMTP id 709F92C06D4 for ; Fri, 5 Apr 2013 17:36:33 +1100 (EST) Received: from co9outboundpool.messaging.microsoft.com (co9ehsobe004.messaging.microsoft.com [207.46.163.27]) (using TLSv1 with cipher AES128-SHA (128/128 bits)) (Client CN "mail.global.frontbridge.com", Issuer "Microsoft Secure Server Authority" (not verified)) by ozlabs.org (Postfix) with ESMTPS id A8BE12C00A9 for ; Fri, 5 Apr 2013 17:34:23 +1100 (EST) Received: from mail1-co9-R.bigfish.com (10.236.132.244) by CO9EHSOBE027.bigfish.com (10.236.130.90) with Microsoft SMTP Server id 14.1.225.23; Fri, 5 Apr 2013 06:34:20 +0000 Received: from mail1-co9 (localhost [127.0.0.1]) by mail1-co9-R.bigfish.com (Postfix) with ESMTP id 205B63001B5 for ; Fri, 5 Apr 2013 06:34:20 +0000 (UTC) X-Forefront-Antispam-Report: CIP:70.37.183.190; KIP:(null); UIP:(null); IPV:NLI; H:mail.freescale.net; RD:none; EFVD:NLI X-SpamScore: 3 X-BigFish: VS3(zzc8kzz1f42h1fc6h1ee6h1de0h1fdah1202h1e76h1d1ah1d2ahzz8275bhz2dh87h2a8h668h839hd24he5bhf0ah107ah11b5h121eh1288h12a5h12a9h12bdh12e5h137ah139eh13b6h1441h14afh1504h1537h162dh1631h1758h1898h18e1h1946h19b5h1ad9h1b0ah1155h) X-FB-DOMAIN-IP-MATCH: fail Received: from mail1-co9 (localhost.localdomain [127.0.0.1]) by mail1-co9 (MessageSwitch) id 1365143657303773_20457; Fri, 5 Apr 2013 06:34:17 +0000 (UTC) Received: from CO9EHSMHS012.bigfish.com (unknown [10.236.132.249]) by mail1-co9.bigfish.com (Postfix) with ESMTP id 47CB6220049 for ; Fri, 5 Apr 2013 06:34:17 +0000 (UTC) Received: from mail.freescale.net (70.37.183.190) by CO9EHSMHS012.bigfish.com (10.236.130.22) with Microsoft SMTP Server (TLS) id 14.1.225.23; Fri, 5 Apr 2013 06:34:12 +0000 Received: from tx30smr01.am.freescale.net (10.81.153.31) by 039-SN1MMR1-004.039d.mgd.msft.net (10.84.1.14) with Microsoft SMTP Server (TLS) id 14.2.328.11; Fri, 5 Apr 2013 06:34:00 +0000 Received: from nmglablinux22.freescale.com (nmglablinux22.zin33.ap.freescale.net [10.232.20.244]) by tx30smr01.am.freescale.net (8.14.3/8.14.0) with ESMTP id r356XwWi011046; Thu, 4 Apr 2013 23:33:59 -0700 Received: by nmglablinux22.freescale.com (Postfix, from userid 65007187) id D601E5DC9A; Fri, 5 Apr 2013 12:03:56 +0530 (IST) From: Shaveta Leekha To: Subject: [PATCH 3/4][v2] powerpc/fsl-booke: Add B4_QDS board support Date: Fri, 5 Apr 2013 12:03:51 +0530 Message-ID: <1365143632-19362-3-git-send-email-shaveta@freescale.com> X-Mailer: git-send-email 1.7.6.GIT In-Reply-To: <1365143632-19362-1-git-send-email-shaveta@freescale.com> References: <1365143632-19362-1-git-send-email-shaveta@freescale.com> MIME-Version: 1.0 X-OriginatorOrg: sigmatel.com Cc: Shaveta Leekha X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" - Add support for B4 board in board file b4_qds.c, It is common for B4860, B4420 and B4220QDS as they share same QDS board - Add B4QDS support in Kconfig and Makefile B4860QDS is a high-performance computing evaluation, development and test platform supporting the B4860 QorIQ Power Architecture processor, with following major features: - Four dual-threaded e6500 Power Architecture processors organized in one cluster-each core runs up to 1.8 GHz - Two DDR3/3L controllers for high-speed memory interface each runs at up to 1866.67 MHz - CoreNet fabric that fully supports coherency using MESI protocol between the e6500 cores, SC3900 FVP cores, memories and external interfaces. - Data Path Acceleration Architecture having FMAN, QMan, BMan, SEC 5.3 and RMAN - Large internal cache memory with snooping and stashing capabilities - Sixteen 10-GHz SerDes lanes that serve: - Two SRIO interfaces. Each supports up to 4 lanes and a total of up to 8 lanes - Up to 8-lanes Common Public Radio Interface (CPRI) controller for glue-less antenna connection - Two 10-Gbit Ethernet controllers (10GEC) - Six 1G/2.5-Gbit Ethernet controllers for network communications - PCI Express controller - Debug (Aurora) - Various system peripherals B4420 and B4220 have some differences in comparison to B4860 with fewer core/clusters(both SC3900 and e6500), fewer DDR controllers, fewer serdes lanes, fewer SGMII interfaces and reduced target frequencies. Key differences between B4860 and B4420: B4420 has: - Fewer e6500 cores: 1 cluster with 2 e6500 cores - Fewer SC3900 cores/clusters: 1 cluster with 2 SC3900 cores per cluster - Single DDRC @ 1.6GHz - 2 X 4 lane serdes - 3 SGMII interfaces - no sRIO - no 10G Key differences between B4860 and B4220: B4220 has: - Fewer e6500 cores: 1 cluster with 1 e6500 core - Fewer SC3900 cores/clusters: 1 cluster with 2 SC3900 cores per cluster - Single DDRC @ 1.33GHz - 2 X 2 lane serdes - 2 SGMII interfaces - no sRIO - no 10G Signed-off-by: Shaveta Leekha --- v2: lines of commit message wrapped at 75 chars max arch/powerpc/platforms/85xx/Kconfig | 17 ++++++ arch/powerpc/platforms/85xx/Makefile | 1 + arch/powerpc/platforms/85xx/b4_qds.c | 102 ++++++++++++++++++++++++++++++++++ 3 files changed, 120 insertions(+), 0 deletions(-) create mode 100644 arch/powerpc/platforms/85xx/b4_qds.c diff --git a/arch/powerpc/platforms/85xx/Kconfig b/arch/powerpc/platforms/85xx/Kconfig index 31dc066..8f02b05 100644 --- a/arch/powerpc/platforms/85xx/Kconfig +++ b/arch/powerpc/platforms/85xx/Kconfig @@ -321,6 +321,23 @@ config T4240_QDS help This option enables support for the T4240 QDS board +config B4_QDS + bool "Freescale B4 QDS" + select DEFAULT_UIMAGE + select E500 + select PPC_E500MC + select PHYS_64BIT + select SWIOTLB + select GENERIC_GPIO + select ARCH_REQUIRE_GPIOLIB + select HAS_RAPIDIO + select PPC_EPAPR_HV_PIC + help + This option enables support for the B4 QDS board + The B4 application development system B4 QDS is a complete + debugging environment intended for engineers developing + applications for the B4. + endif endif # FSL_SOC_BOOKE diff --git a/arch/powerpc/platforms/85xx/Makefile b/arch/powerpc/platforms/85xx/Makefile index 712e233..2eab37e 100644 --- a/arch/powerpc/platforms/85xx/Makefile +++ b/arch/powerpc/platforms/85xx/Makefile @@ -23,6 +23,7 @@ obj-$(CONFIG_P4080_DS) += p4080_ds.o corenet_ds.o obj-$(CONFIG_P5020_DS) += p5020_ds.o corenet_ds.o obj-$(CONFIG_P5040_DS) += p5040_ds.o corenet_ds.o obj-$(CONFIG_T4240_QDS) += t4240_qds.o corenet_ds.o +obj-$(CONFIG_B4_QDS) += b4_qds.o corenet_ds.o obj-$(CONFIG_STX_GP3) += stx_gp3.o obj-$(CONFIG_TQM85xx) += tqm85xx.o obj-$(CONFIG_SBC8548) += sbc8548.o diff --git a/arch/powerpc/platforms/85xx/b4_qds.c b/arch/powerpc/platforms/85xx/b4_qds.c new file mode 100644 index 0000000..0c6702f --- /dev/null +++ b/arch/powerpc/platforms/85xx/b4_qds.c @@ -0,0 +1,102 @@ +/* + * B4 QDS Setup + * Should apply for QDS platform of B4860 and it's personalities. + * viz B4860/B4420/B4220QDS + * + * Copyright 2012 Freescale Semiconductor Inc. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +#include "corenet_ds.h" + +/* + * Called very early, device-tree isn't unflattened + */ +static int __init b4_qds_probe(void) +{ + unsigned long root = of_get_flat_dt_root(); +#ifdef CONFIG_SMP + extern struct smp_ops_t smp_85xx_ops; +#endif + + if ((of_flat_dt_is_compatible(root, "fsl,B4860QDS")) || + (of_flat_dt_is_compatible(root, "fsl,B4420QDS")) || + (of_flat_dt_is_compatible(root, "fsl,B4220QDS"))) + return 1; + + /* Check if we're running under the Freescale hypervisor */ + if ((of_flat_dt_is_compatible(root, "fsl,B4860QDS-hv")) || + (of_flat_dt_is_compatible(root, "fsl,B4420QDS-hv")) || + (of_flat_dt_is_compatible(root, "fsl,B4220QDS-hv"))) { + ppc_md.init_IRQ = ehv_pic_init; + ppc_md.get_irq = ehv_pic_get_irq; + ppc_md.restart = fsl_hv_restart; + ppc_md.power_off = fsl_hv_halt; + ppc_md.halt = fsl_hv_halt; +#ifdef CONFIG_SMP + /* + * Disable the timebase sync operations because we can't write + * to the timebase registers under the hypervisor. + */ + smp_85xx_ops.give_timebase = NULL; + smp_85xx_ops.take_timebase = NULL; +#endif + return 1; + } + + return 0; +} + +define_machine(b4_qds) { + .name = "B4 QDS", + .probe = b4_qds_probe, + .setup_arch = corenet_ds_setup_arch, + .init_IRQ = corenet_ds_pic_init, +#ifdef CONFIG_PCI + .pcibios_fixup_bus = fsl_pcibios_fixup_bus, +#endif +/* coreint doesn't play nice with lazy EE, use legacy mpic for now */ +#ifdef CONFIG_PPC64 + .get_irq = mpic_get_irq, +#else + .get_irq = mpic_get_coreint_irq, +#endif + .restart = fsl_rstcr_restart, + .calibrate_decr = generic_calibrate_decr, + .progress = udbg_progress, +#ifdef CONFIG_PPC64 + .power_save = book3e_idle, +#else + .power_save = e500_idle, +#endif +}; + +machine_arch_initcall(b4_qds, corenet_ds_publish_devices); + +#ifdef CONFIG_SWIOTLB +machine_arch_initcall(b4_qds, swiotlb_setup_bus_notifier); +#endif