From patchwork Thu Apr 4 22:56:20 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 233983 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 291992C00AB for ; Fri, 5 Apr 2013 10:09:24 +1100 (EST) Received: from localhost ([::1]:57691 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UNtHW-0006XR-7v for incoming@patchwork.ozlabs.org; Thu, 04 Apr 2013 19:09:22 -0400 Received: from eggs.gnu.org ([208.118.235.92]:47693) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UNt6C-0006Un-Fq for qemu-devel@nongnu.org; Thu, 04 Apr 2013 18:57:46 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1UNt66-0001Qm-6N for qemu-devel@nongnu.org; Thu, 04 Apr 2013 18:57:40 -0400 Received: from mail-oa0-f42.google.com ([209.85.219.42]:38785) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UNt65-0001QX-QK for qemu-devel@nongnu.org; Thu, 04 Apr 2013 18:57:34 -0400 Received: by mail-oa0-f42.google.com with SMTP id i18so3445346oag.15 for ; Thu, 04 Apr 2013 15:57:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=x-received:sender:from:to:cc:subject:date:message-id:x-mailer :in-reply-to:references; bh=3OtedlvAJWXdHnPV5MaAqYz3OUrJwOLAC5cyySztq3g=; b=os5JxOf1cegEKNHK3cCq8JhP3SbIFcMQ/TTmaPAjwTBcb1WCyyHVhoj9bP/c2QIgfz rJ/L0HoyCX732ovFVDPwo4TxCBe+Zw3Q9YDgh7NCKgJFNCroNfth/tZxrAMzKpXF7mSX JRJnHltjHVXTcng2y92+koRHfzCC5jsim9070SBUU2KFmlRZRci+IJY25ATixa/puNNp QJPxpXU3EoP7ZJ7+ojKhNMEXcCeQTE1ueIbz5UubbCC0B2cD/bGx3CPde+xvizHY0lxk +iQJL0vdaab7l1pV9yW8ELvFtpRpgAPtcCZ85oWjJkMkwSX/t8xxiPFRWmJ8+Vunu+1w xoOw== X-Received: by 10.60.47.33 with SMTP id a1mr6224632oen.79.1365116253153; Thu, 04 Apr 2013 15:57:33 -0700 (PDT) Received: from pebble.com ([12.236.175.36]) by mx.google.com with ESMTPS id j10sm9227424obg.4.2013.04.04.15.57.31 (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Thu, 04 Apr 2013 15:57:32 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Thu, 4 Apr 2013 17:56:20 -0500 Message-Id: <1365116186-19382-28-git-send-email-rth@twiddle.net> X-Mailer: git-send-email 1.8.1.4 In-Reply-To: <1365116186-19382-1-git-send-email-rth@twiddle.net> References: <1365116186-19382-1-git-send-email-rth@twiddle.net> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [fuzzy] X-Received-From: 209.85.219.42 Cc: av1474@comtv.ru, Aurelien Jarno Subject: [Qemu-devel] [PATCH v4 27/33] tcg-ppc64: Use MFOCRF instead of MFCR X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org It takes half the cycles to read one CR register instead of all 8. This is a backward compatible addition to the ISA, so chips prior to Power 2.00 spec will simply continue to read the entire CR register. Signed-off-by: Richard Henderson Reviewed-by: Aurelien Jarno --- tcg/ppc64/tcg-target.c | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/tcg/ppc64/tcg-target.c b/tcg/ppc64/tcg-target.c index 806f3e2..f0ed698 100644 --- a/tcg/ppc64/tcg-target.c +++ b/tcg/ppc64/tcg-target.c @@ -382,6 +382,7 @@ static int tcg_target_const_match (tcg_target_long val, #define SRAWI XO31(824) #define NEG XO31(104) #define MFCR XO31( 19) +#define MFOCRF (MFCR | (1u << 20)) #define NOR XO31(124) #define CNTLZW XO31( 26) #define CNTLZD XO31( 58) @@ -430,6 +431,7 @@ static int tcg_target_const_match (tcg_target_long val, #define ME(e) ((e)<<1) #define BO(o) ((o)<<21) #define MB64(b) ((b)<<5) +#define FXM(b) (1 << (19 - (b))) #define LK 1 @@ -1226,10 +1228,12 @@ static void tcg_out_setcond (TCGContext *s, TCGType type, TCGCond cond, sh = 31; crop = CRNOR | BT (7, CR_EQ) | BA (7, CR_GT) | BB (7, CR_GT); crtest: - tcg_out_cmp (s, cond, arg1, arg2, const_arg2, 7, type); - if (crop) tcg_out32 (s, crop); - tcg_out32 (s, MFCR | RT (0)); - tcg_out_rlw(s, RLWINM, arg0, 0, sh, 31, 31); + tcg_out_cmp(s, cond, arg1, arg2, const_arg2, 7, type); + if (crop) { + tcg_out32(s, crop); + } + tcg_out32(s, MFOCRF | RT(TCG_REG_R0) | FXM(7)); + tcg_out_rlw(s, RLWINM, arg0, TCG_REG_R0, sh, 31, 31); break; default: