Patchwork ARM i.MX6: Fix ldb_di clock selection

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Submitter Dirk Behme
Date April 4, 2013, 2:03 p.m.
Message ID <1365084209-27240-1-git-send-email-dirk.behme@de.bosch.com>
Download mbox | patch
Permalink /patch/233832/
State New
Headers show

Comments

Dirk Behme - April 4, 2013, 2:03 p.m.
According to the recent i.MX6 Quad technical reference manual, mode 0x4 (100b)
of the CCM_CS2DCR register (address 0x020C402C) bits [11-9] and [14-12] select
the PLL3 clock, and not the PLL3 PFD1 540M clock. In our code, the PLL3 root
clock is named 'pll3_usb_otg', select this instead of the 540M clock.

Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com>
CC: Shawn Guo <shawn.guo@linaro.org>
---
 arch/arm/mach-imx/clk-imx6q.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
Shawn Guo - April 5, 2013, 9:29 a.m.
Arnd, Olof,

Please help apply this as a fix for 3.9.

On Thu, Apr 04, 2013 at 04:03:29PM +0200, Dirk Behme wrote:
> According to the recent i.MX6 Quad technical reference manual, mode 0x4 (100b)
> of the CCM_CS2DCR register (address 0x020C402C) bits [11-9] and [14-12] select
> the PLL3 clock, and not the PLL3 PFD1 540M clock. In our code, the PLL3 root
> clock is named 'pll3_usb_otg', select this instead of the 540M clock.
> 
> Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com>

Cc: <stable@vger.kernel.org>

Acked-by: Shawn Guo <shawn.guo@linaro.org>
Shawn Guo - April 9, 2013, 11:50 a.m.
On Fri, Apr 05, 2013 at 05:29:50PM +0800, Shawn Guo wrote:
> Arnd, Olof,
> 
> Please help apply this as a fix for 3.9.
> 
I will send a new pull request which includes this fix.

Shawn

> On Thu, Apr 04, 2013 at 04:03:29PM +0200, Dirk Behme wrote:
> > According to the recent i.MX6 Quad technical reference manual, mode 0x4 (100b)
> > of the CCM_CS2DCR register (address 0x020C402C) bits [11-9] and [14-12] select
> > the PLL3 clock, and not the PLL3 PFD1 540M clock. In our code, the PLL3 root
> > clock is named 'pll3_usb_otg', select this instead of the 540M clock.
> > 
> > Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com>
> 
> Cc: <stable@vger.kernel.org>
> 
> Acked-by: Shawn Guo <shawn.guo@linaro.org>
> 
> 
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

Patch

diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c
index 2f9ff93..57bd680 100644
--- a/arch/arm/mach-imx/clk-imx6q.c
+++ b/arch/arm/mach-imx/clk-imx6q.c
@@ -115,7 +115,7 @@  static const char *gpu2d_core_sels[]	= { "axi", "pll3_usb_otg", "pll2_pfd0_352m"
 static const char *gpu3d_core_sels[]	= { "mmdc_ch0_axi", "pll3_usb_otg", "pll2_pfd1_594m", "pll2_pfd2_396m", };
 static const char *gpu3d_shader_sels[] = { "mmdc_ch0_axi", "pll3_usb_otg", "pll2_pfd1_594m", "pll2_pfd9_720m", };
 static const char *ipu_sels[]		= { "mmdc_ch0_axi", "pll2_pfd2_396m", "pll3_120m", "pll3_pfd1_540m", };
-static const char *ldb_di_sels[]	= { "pll5_video", "pll2_pfd0_352m", "pll2_pfd2_396m", "mmdc_ch1_axi", "pll3_pfd1_540m", };
+static const char *ldb_di_sels[]	= { "pll5_video", "pll2_pfd0_352m", "pll2_pfd2_396m", "mmdc_ch1_axi", "pll3_usb_otg", };
 static const char *ipu_di_pre_sels[]	= { "mmdc_ch0_axi", "pll3_usb_otg", "pll5_video", "pll2_pfd0_352m", "pll2_pfd2_396m", "pll3_pfd1_540m", };
 static const char *ipu1_di0_sels[]	= { "ipu1_di0_pre", "dummy", "dummy", "ldb_di0", "ldb_di1", };
 static const char *ipu1_di1_sels[]	= { "ipu1_di1_pre", "dummy", "dummy", "ldb_di0", "ldb_di1", };