From patchwork Thu Apr 4 10:27:13 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Florian Fainelli X-Patchwork-Id: 233704 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 981B32C00AD for ; Thu, 4 Apr 2013 21:27:41 +1100 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1759158Ab3DDK1g (ORCPT ); Thu, 4 Apr 2013 06:27:36 -0400 Received: from zmc.proxad.net ([212.27.53.206]:51601 "EHLO zmc.proxad.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1759071Ab3DDK1e (ORCPT ); Thu, 4 Apr 2013 06:27:34 -0400 Received: from localhost (localhost [127.0.0.1]) by zmc.proxad.net (Postfix) with ESMTP id 23E95C8350A; Thu, 4 Apr 2013 12:27:33 +0200 (CEST) X-Virus-Scanned: amavisd-new at localhost Received: from zmc.proxad.net ([127.0.0.1]) by localhost (zmc.proxad.net [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 1F4ZZTgvCbom; Thu, 4 Apr 2013 12:27:32 +0200 (CEST) Received: from flexo.iliad.local (freebox.vlq16.iliad.fr [213.36.7.13]) by zmc.proxad.net (Postfix) with ESMTPSA id 86B6BC8350B; Thu, 4 Apr 2013 12:27:32 +0200 (CEST) From: Florian Fainelli To: davem@davemloft.net Cc: netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree-discuss@lists.ozlabs.org, thomas.petazzoni@free-electrons.com, jm@lentin.co.uk, moinejf@free.fr, sebastian.hesselbarth@gmail.com, buytenh@wantstofly.org, andrew@lunn.ch, jason@lakedaemon.net, grant.likely@secretlab.ca, rob.herring@calxeda.com, jogo@openwrt.org, Florian Fainelli Subject: [PATCH 3/5 v2] ARM: kirkwood: add device node entries for the gigabit interfaces Date: Thu, 4 Apr 2013 12:27:13 +0200 Message-Id: <1365071235-11611-4-git-send-email-florian@openwrt.org> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1365071235-11611-1-git-send-email-florian@openwrt.org> References: <1365071235-11611-1-git-send-email-florian@openwrt.org> Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org This patch modifies kirkwood.dtsi to specify the various gigabit interfaces nodes available on kirkwood devices. They are disabled by default and should be enabled on a per-board basis. egiga0 and egiga1 aliases are defined for convenience. The mdio node is also present and should be enabled on a per-board basis as well. Signed-off-by: Florian Fainelli --- Changes since v1: - dropped change to arch/arm/mach-kirkwood/common.c to avoid merge conflicts - fixed off-by 0x2000 ethernet-group nodes address arch/arm/boot/dts/kirkwood.dtsi | 46 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 46 insertions(+) diff --git a/arch/arm/boot/dts/kirkwood.dtsi b/arch/arm/boot/dts/kirkwood.dtsi index fada7e6..254f5a8 100644 --- a/arch/arm/boot/dts/kirkwood.dtsi +++ b/arch/arm/boot/dts/kirkwood.dtsi @@ -7,6 +7,8 @@ aliases { gpio0 = &gpio0; gpio1 = &gpio1; + egiga0 = &egiga0; + egiga1 = &egiga1; }; intc: interrupt-controller { compatible = "marvell,orion-intc", "marvell,intc"; @@ -202,5 +204,49 @@ clocks = <&gate_clk 4>; status = "disabled"; }; + + mdio@72004 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "marvell,orion-mdio"; + reg = <0x72004 0x84>; + status = "disabled"; + }; + + ethernet-group@72000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "marvell,mv643xx-eth-block"; + reg = <0x72000 0x4000>; + tx-csum-limit = <1600>; + status = "disabled"; + + egiga0: egiga0@0 { + device_type = "network"; + compatible = "marvell,mv643xx-eth"; + reg = <0>; + interrupts = <11>; + clocks = <&gate_clk 0>; + clock-names = "0"; + }; + }; + + ethernet-group@76000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "marvell,mv643xx-eth-block"; + reg = <0x76000 0x4000>; + tx-csum-limit = <1600>; + status = "disabled"; + + egiga1: egiga1@0 { + device_type = "network"; + compatible = "marvell,mv643xx-eth"; + reg = <0>; + interrupts = <15>; + clocks = <&gate_clk 19>; + clock-names = "1"; + }; + }; }; };