Patchwork [U-Boot,1/4] omap2420-h4: Fix DRAM initialisation

login
register
mail settings
Submitter Hunter, Jon
Date April 3, 2013, 7:35 p.m.
Message ID <1365017737-5926-2-git-send-email-jon-hunter@ti.com>
Download mbox | patch
Permalink /patch/233576/
State Accepted
Delegated to: Tom Rini
Headers show

Comments

Hunter, Jon - April 3, 2013, 7:35 p.m.
The size of the DRAM for the omap2420-h4 board is getting setup in the
dram_init() function. However, for the current u-boot release this is
too late and needs to be done in dram_init_banksize(). Therefore, add
a dram_init_banksize() function for the omap2420-h4 board and setup the
DRAM size there.

Signed-off-by: Jon Hunter <jon-hunter@ti.com>
---
 board/ti/omap2420h4/omap2420h4.c |   24 ++++++++++++++++++------
 1 file changed, 18 insertions(+), 6 deletions(-)

Patch

diff --git a/board/ti/omap2420h4/omap2420h4.c b/board/ti/omap2420h4/omap2420h4.c
index 188e4ac..532e989 100644
--- a/board/ti/omap2420h4/omap2420h4.c
+++ b/board/ti/omap2420h4/omap2420h4.c
@@ -190,10 +190,10 @@  void ether_init (void)
  * Routine: dram_init
  * Description: sets uboots idea of sdram size
  **********************************************/
-int dram_init (void)
+int dram_init(void)
 {
 	unsigned int size0=0,size1=0;
-	u32 mtype, btype, rev;
+	u32 mtype, btype;
 	u8 chg_on = 0x5; /* enable charge of back up battery */
 	u8 vmode_on = 0x8C;
 	#define NOT_EARLY 0
@@ -202,7 +202,6 @@  int dram_init (void)
 
 	btype = get_board_type();
 	mtype = get_mem_type();
-	rev = get_cpu_rev();
 
 	display_board_info(btype);
 	if (btype == BOARD_H4_MENELAUS){
@@ -217,15 +216,28 @@  int dram_init (void)
 	size0 = get_sdr_cs_size(SDRC_CS0_OSET);
 	size1 = get_sdr_cs_size(SDRC_CS1_OSET);
 
-	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
-	gd->bd->bi_dram[0].size = size0;
+	gd->ram_size = get_ram_size((long *)PHYS_SDRAM_1, size0 + size1);
+
+	return 0;
+}
+
+void dram_init_banksize(void)
+{
+	unsigned int size0, size1;
+	u32 rev;
+
+	rev = get_cpu_rev();
+	size0 = get_sdr_cs_size(SDRC_CS0_OSET);
+	size1 = get_sdr_cs_size(SDRC_CS1_OSET);
+
 	if(rev == CPU_2420_2422_ES1) /* ES1's 128MB remap granularity isn't worth doing */
 		gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
 	else /* ES2 and above can remap at 32MB granularity */
 		gd->bd->bi_dram[1].start = PHYS_SDRAM_1+size0;
 	gd->bd->bi_dram[1].size = size1;
 
-	return 0;
+	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
+	gd->bd->bi_dram[0].size = size0;
 }
 
 /**********************************************************