Patchwork [U-Boot] pcm051: Enable DDR PHY dynamic power down bit

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Submitter Lars Poeschel
Date April 3, 2013, 2:37 p.m.
Message ID <1364999872-21990-1-git-send-email-larsi@wh2.tu-dresden.de>
Download mbox | patch
Permalink /patch/233507/
State Accepted
Delegated to: Tom Rini
Headers show

Comments

Lars Poeschel - April 3, 2013, 2:37 p.m.
From: Lars Poeschel <poeschel@lemonage.de>

This is done already for am335x in
59dcf970d11ebff5d9f4bbbde79fda584e9e7ad4 and also applies for pcm051.

It powers down the IO receiver when not performing read which helps
reducing the overall power consuption in low power states
(suspend/standby).

Signed-off-by: Lars Poeschel <poeschel@lemonage.de>
---
 board/phytec/pcm051/board.c |    3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)
Tom Rini - April 8, 2013, 4:56 p.m.
On Wed, Apr 03, 2013 at 04:37:52AM -0000, Lars Poeschel wrote:

> From: Lars Poeschel <poeschel@lemonage.de>
> 
> This is done already for am335x in
> 59dcf970d11ebff5d9f4bbbde79fda584e9e7ad4 and also applies for pcm051.
> 
> It powers down the IO receiver when not performing read which helps
> reducing the overall power consuption in low power states
> (suspend/standby).
> 
> Signed-off-by: Lars Poeschel <poeschel@lemonage.de>

Applied to u-boot-ti/master, thanks!

Patch

diff --git a/board/phytec/pcm051/board.c b/board/phytec/pcm051/board.c
index 1708ac2..43d7b6e 100644
--- a/board/phytec/pcm051/board.c
+++ b/board/phytec/pcm051/board.c
@@ -104,7 +104,8 @@  static struct emif_regs ddr3_emif_reg_data = {
 	.sdram_tim2 = MT41J256M8HX15E_EMIF_TIM2,
 	.sdram_tim3 = MT41J256M8HX15E_EMIF_TIM3,
 	.zq_config = MT41J256M8HX15E_ZQ_CFG,
-	.emif_ddr_phy_ctlr_1 = MT41J256M8HX15E_EMIF_READ_LATENCY,
+	.emif_ddr_phy_ctlr_1 = MT41J256M8HX15E_EMIF_READ_LATENCY |
+				PHY_EN_DYN_PWRDN,
 };
 #endif