Patchwork hw/nand.c: Fix nand erase operation

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Submitter Peter Crosthwaite
Date April 3, 2013, 5:33 a.m.
Message ID <1364967188-26711-1-git-send-email-peter.crosthwaite@xilinx.com>
Download mbox | patch
Permalink /patch/233252/
State New
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Comments

Peter Crosthwaite - April 3, 2013, 5:33 a.m.
From: Wendy Liang <wendy.liang@xilinx.com>

Usually, nand erase operation has only 2 or 3 address cycles.
We need to mask s->addr to zero unset stale high-order bytes in the nand address
before using it as the erase address.

This fixes the NAND erase operation in Linux.

[PC: Generalised to work for any number of address cycles rather than just 3]

Signed-off-by: Wendy Liang <jliang@xilinx.com>
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
---
 hw/nand.c |    1 +
 1 files changed, 1 insertions(+), 0 deletions(-)
Peter Maydell - April 5, 2013, 4:19 p.m.
On 3 April 2013 06:33, Peter Crosthwaite <peter.crosthwaite@xilinx.com> wrote:
> From: Wendy Liang <wendy.liang@xilinx.com>
>
> Usually, nand erase operation has only 2 or 3 address cycles.
> We need to mask s->addr to zero unset stale high-order bytes in the nand address
> before using it as the erase address.
>
> This fixes the NAND erase operation in Linux.
>
> [PC: Generalised to work for any number of address cycles rather than just 3]
>
> Signed-off-by: Wendy Liang <jliang@xilinx.com>
> Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>

I kind of feel like in the long term this is making this code even
more confusing, but at least it fixes the bug and doesn't mess
anything else up.

Applied to arm-devs.next.

thanks
-- PMM

Patch

diff --git a/hw/nand.c b/hw/nand.c
index de3e502..6362093 100644
--- a/hw/nand.c
+++ b/hw/nand.c
@@ -297,6 +297,7 @@  static void nand_command(NANDFlashState *s)
         break;
 
     case NAND_CMD_BLOCKERASE2:
+        s->addr &= (1ull << s->addrlen * 8) - 1;
         if (nand_flash_ids[s->chip_id].options & NAND_SAMSUNG_LP)
             s->addr <<= 16;
         else