From patchwork Wed Apr 3 04:33:06 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Crosthwaite X-Patchwork-Id: 233232 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 0E3232C00B1 for ; Wed, 3 Apr 2013 15:39:58 +1100 (EST) Received: from localhost ([::1]:55659 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UNFUH-00065e-IB for incoming@patchwork.ozlabs.org; Wed, 03 Apr 2013 00:39:53 -0400 Received: from eggs.gnu.org ([208.118.235.92]:60764) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UNFTw-00063y-Dd for qemu-devel@nongnu.org; Wed, 03 Apr 2013 00:39:33 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1UNFTv-0007oN-C6 for qemu-devel@nongnu.org; Wed, 03 Apr 2013 00:39:32 -0400 Received: from mail-pa0-f46.google.com ([209.85.220.46]:41737) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UNFTv-0007nO-6y for qemu-devel@nongnu.org; Wed, 03 Apr 2013 00:39:31 -0400 Received: by mail-pa0-f46.google.com with SMTP id lb1so666333pab.33 for ; Tue, 02 Apr 2013 21:39:30 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-received:sender:from:to:cc:subject:date:message-id:x-mailer :in-reply-to:references:in-reply-to:references:x-gm-message-state; bh=aDJLyMxyz3L8f1MYCBEw1oGRE30fwHy6ol1vw5jj2C4=; b=WdAjaccyGj9gQcKIF7I1u6/tkEGyXCRctUA3ZZdby4v363XZW01pPFrnSX+8sbpXnn v4OxPoAAXbsXdfHoFNZiU9FFHFDwBe9dcGzNP+c752n9Yw7rLjAaPYzT2RmMRtlGpw3T DS2S5T4sUhKs8HpHtEGr+3N0bTbE+RkjAFNq0xmVFMBmbzeuFOGCpTDSh4O2yLJmkHkZ ZhvG5qAN+vjFosLQqsUDllHo99C9hJPTyH3Yc2cikiFphnuXYn6WhQ9hFQqK4KjNE3H9 Hv3X9SZjQSztxIR3xNWS8eYod7yNbja5RTKwhG/qI3ck/R2+DMxfdT/wguyldfujq5OW IH9Q== X-Received: by 10.66.120.173 with SMTP id ld13mr307526pab.187.1364963970463; Tue, 02 Apr 2013 21:39:30 -0700 (PDT) Received: from localhost ([149.199.62.254]) by mx.google.com with ESMTPS id ti8sm4356217pbc.12.2013.04.02.21.39.28 (version=TLSv1.1 cipher=RC4-SHA bits=128/128); Tue, 02 Apr 2013 21:39:29 -0700 (PDT) From: Peter Crosthwaite To: qemu-devel@nongnu.org, peter.maydell@linaro.org Date: Wed, 3 Apr 2013 14:33:06 +1000 Message-Id: <880fee9ed18dd62e3f244a246c23efb16b8dd216.1364962908.git.peter.crosthwaite@xilinx.com> X-Mailer: git-send-email 1.7.0.4 In-Reply-To: <475b23a3c56ec5ee1a8652f33e0a12d0bb4ac7f6.1364962908.git.peter.crosthwaite@xilinx.com> References: <475b23a3c56ec5ee1a8652f33e0a12d0bb4ac7f6.1364962908.git.peter.crosthwaite@xilinx.com> In-Reply-To: References: X-Gm-Message-State: ALoCoQn0j/w4AIvB+it5hhqJ7ZZg6YdZz5dIWaQaDDK5X3rIMsRofRVp6aVqWJ6qh1s8C1eD+EHR X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [fuzzy] X-Received-From: 209.85.220.46 Cc: Peter Crosthwaite Subject: [Qemu-devel] [PATCH arm-devs v1 14/15] xilinx_spips: lqspi: Push more data to tx-fifo X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Do 16 words per fifo flush. Increases performance and decreases debug verbosity. This data depth has no real hardware analogue, so just go with something that has reasonable performance. Signed-off-by: Peter Crosthwaite --- hw/xilinx_spips.c | 11 +++++++---- 1 files changed, 7 insertions(+), 4 deletions(-) diff --git a/hw/xilinx_spips.c b/hw/xilinx_spips.c index 5ac0f64..32d8db8 100644 --- a/hw/xilinx_spips.c +++ b/hw/xilinx_spips.c @@ -571,11 +571,14 @@ lqspi_read(void *opaque, hwaddr addr, unsigned int size) DB_PRINT_L(0, "starting QSPI data read\n"); - for (i = 0; i < LQSPI_CACHE_SIZE / 4; ++i) { - tx_data_bytes(s, 0, 4); + while (cache_entry < LQSPI_CACHE_SIZE / 4) { + for (i = 0; i < 16; ++i) { + tx_data_bytes(s, 0, 4); + } xilinx_spips_flush_txfifo(s); - rx_data_bytes(s, &q->lqspi_buf[cache_entry], 4); - cache_entry++; + for (i = 0; i < 16; ++i) { + rx_data_bytes(s, &q->lqspi_buf[cache_entry++], 4); + } } s->regs[R_CONFIG] |= CS;