Patchwork [arm-devs,v1,14/15] xilinx_spips: lqspi: Push more data to tx-fifo

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Submitter Peter Crosthwaite
Date April 3, 2013, 4:33 a.m.
Message ID <880fee9ed18dd62e3f244a246c23efb16b8dd216.1364962908.git.peter.crosthwaite@xilinx.com>
Download mbox | patch
Permalink /patch/233232/
State New
Headers show

Comments

Peter Crosthwaite - April 3, 2013, 4:33 a.m.
Do 16 words per fifo flush. Increases performance and decreases
debug verbosity. This data depth has no real hardware analogue,
so just go with something that has reasonable performance.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
---

 hw/xilinx_spips.c |   11 +++++++----
 1 files changed, 7 insertions(+), 4 deletions(-)

Patch

diff --git a/hw/xilinx_spips.c b/hw/xilinx_spips.c
index 5ac0f64..32d8db8 100644
--- a/hw/xilinx_spips.c
+++ b/hw/xilinx_spips.c
@@ -571,11 +571,14 @@  lqspi_read(void *opaque, hwaddr addr, unsigned int size)
 
         DB_PRINT_L(0, "starting QSPI data read\n");
 
-        for (i = 0; i < LQSPI_CACHE_SIZE / 4; ++i) {
-            tx_data_bytes(s, 0, 4);
+        while (cache_entry < LQSPI_CACHE_SIZE / 4) {
+            for (i = 0; i < 16; ++i) {
+                tx_data_bytes(s, 0, 4);
+            }
             xilinx_spips_flush_txfifo(s);
-            rx_data_bytes(s, &q->lqspi_buf[cache_entry], 4);
-            cache_entry++;
+            for (i = 0; i < 16; ++i) {
+                rx_data_bytes(s, &q->lqspi_buf[cache_entry++], 4);
+            }
         }
 
         s->regs[R_CONFIG] |= CS;