From patchwork Wed Apr 3 04:33:05 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Crosthwaite X-Patchwork-Id: 233231 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 1D3CE2C0095 for ; Wed, 3 Apr 2013 15:39:26 +1100 (EST) Received: from localhost ([::1]:54126 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UNFTl-0005Ep-Rx for incoming@patchwork.ozlabs.org; Wed, 03 Apr 2013 00:39:21 -0400 Received: from eggs.gnu.org ([208.118.235.92]:60627) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UNFTM-00059S-GS for qemu-devel@nongnu.org; Wed, 03 Apr 2013 00:38:57 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1UNFTL-0007PB-5J for qemu-devel@nongnu.org; Wed, 03 Apr 2013 00:38:56 -0400 Received: from mail-pb0-f48.google.com ([209.85.160.48]:40371) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UNFTK-0007P5-S7 for qemu-devel@nongnu.org; Wed, 03 Apr 2013 00:38:55 -0400 Received: by mail-pb0-f48.google.com with SMTP id xb4so622289pbc.7 for ; Tue, 02 Apr 2013 21:38:54 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-received:sender:from:to:cc:subject:date:message-id:x-mailer :in-reply-to:references:in-reply-to:references:x-gm-message-state; bh=r5yyfSuO+46h+fkCAXKovDHdK6Gk6vEQrxhSdcT6Qw8=; b=kk+20oYBBnwKTVIs+86LDcRCv888c0Kjv4/FhOuXb8MJJiNU8ABtzmblzrp1/EEX9S Ru0VR37fmZVxb7SZGa0vE1m/qsHaUF2bJ/HAa+uuQUHh2LvCSB4CfwAo7R0DCOOOuYVj DABIxPYc3wMFexaKPZ09gANbXXQ0fVFgF6KC94d1Mjlco1FD9YmuVOW+WImiemZqDwS+ DJtJ/8qOshZhKIDtOOx6KyNdlzv7DDQ6xpcnsEZIkq0OKndFPy6HRraCXjzky9LnV3v4 FTc9pO8PGTeKcoVUyID7iPPv6bysdxUsdC8L45mIpJnfvy7nODY5ENtGWAa9YB2TE2TB 294w== X-Received: by 10.68.164.33 with SMTP id yn1mr178869pbb.166.1364963934001; Tue, 02 Apr 2013 21:38:54 -0700 (PDT) Received: from localhost ([149.199.62.254]) by mx.google.com with ESMTPS id xc4sm4297318pbc.41.2013.04.02.21.38.51 (version=TLSv1.1 cipher=RC4-SHA bits=128/128); Tue, 02 Apr 2013 21:38:53 -0700 (PDT) From: Peter Crosthwaite To: qemu-devel@nongnu.org, peter.maydell@linaro.org Date: Wed, 3 Apr 2013 14:33:05 +1000 Message-Id: X-Mailer: git-send-email 1.7.0.4 In-Reply-To: <475b23a3c56ec5ee1a8652f33e0a12d0bb4ac7f6.1364962908.git.peter.crosthwaite@xilinx.com> References: <475b23a3c56ec5ee1a8652f33e0a12d0bb4ac7f6.1364962908.git.peter.crosthwaite@xilinx.com> In-Reply-To: References: X-Gm-Message-State: ALoCoQkChDYzhQdgF6qn4k9usbBsIOtNgKq1BpQV+n6S4tzA2m/VYHL/V04551K2GmL0SHFsKHdV X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [fuzzy] X-Received-From: 209.85.160.48 Cc: Peter Crosthwaite Subject: [Qemu-devel] [PATCH arm-devs v1 13/15] xilinx_spips: Multiple debug verbosity levels X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org The debug printfs on every SPI operation is extremely verbose. Add a second level of debug for this. Signed-off-by: Peter Crosthwaite --- hw/xilinx_spips.c | 68 ++++++++++++++++++++++++++++++++--------------------- 1 files changed, 41 insertions(+), 27 deletions(-) diff --git a/hw/xilinx_spips.c b/hw/xilinx_spips.c index 0d01103..5ac0f64 100644 --- a/hw/xilinx_spips.c +++ b/hw/xilinx_spips.c @@ -30,15 +30,17 @@ #include "hw/ssi.h" #include "qemu/bitops.h" -#ifdef XILINX_SPIPS_ERR_DEBUG -#define DB_PRINT(...) do { \ - fprintf(stderr, ": %s: ", __func__); \ - fprintf(stderr, ## __VA_ARGS__); \ - } while (0); -#else - #define DB_PRINT(...) +#ifndef XILINX_SPIPS_ERR_DEBUG +#define XILINX_SPIPS_ERR_DEBUG 0 #endif +#define DB_PRINT_L(level, ...) do { \ + if (XILINX_SPIPS_ERR_DEBUG > (level)) { \ + fprintf(stderr, ": %s: ", __func__); \ + fprintf(stderr, ## __VA_ARGS__); \ + } \ +} while (0); + /* config register */ #define R_CONFIG (0x00 / 4) #define IFMODE (1 << 31) @@ -196,7 +198,7 @@ static void xilinx_spips_update_cs_lines(XilinxSPIPS *s) (s->num_cs * s->num_busses); if (xilinx_spips_cs_is_set(s, i, field) && !found) { - DB_PRINT("selecting slave %d\n", i); + DB_PRINT_L(0, "selecting slave %d\n", i); qemu_set_irq(s->cs_lines[cs_to_set], 0); } else { qemu_set_irq(s->cs_lines[cs_to_set], 1); @@ -208,7 +210,7 @@ static void xilinx_spips_update_cs_lines(XilinxSPIPS *s) } if (!found) { s->snoop_state = SNOOP_CHECKING; - DB_PRINT("moving to snoop check state\n"); + DB_PRINT_L(1, "moving to snoop check state\n"); } } @@ -281,6 +283,8 @@ static inline void stripe8(uint8_t *x, int num, bool dir) static void xilinx_spips_flush_txfifo(XilinxSPIPS *s) { + int debug_level = 0; + for (;;) { int i; uint8_t tx = 0; @@ -305,14 +309,14 @@ static void xilinx_spips_flush_txfifo(XilinxSPIPS *s) } for (i = 0; i < num_effective_busses(s); ++i) { - DB_PRINT("tx = %02x\n", tx_rx[i]); + DB_PRINT_L(debug_level, "tx = %02x\n", tx_rx[i]); tx_rx[i] = ssi_transfer(s->spi[i], (uint32_t)tx_rx[i]); - DB_PRINT("rx = %02x\n", tx_rx[i]); + DB_PRINT_L(debug_level, "rx = %02x\n", tx_rx[i]); } if (fifo8_is_full(&s->rx_fifo)) { s->regs[R_INTR_STATUS] |= IXR_RX_FIFO_OVERFLOW; - DB_PRINT("rx FIFO overflow"); + DB_PRINT_L(0, "rx FIFO overflow"); } else if (s->snoop_state == SNOOP_STRIPING) { stripe8(tx_rx, num_effective_busses(s), true); for (i = 0; i < num_effective_busses(s); ++i) { @@ -322,7 +326,8 @@ static void xilinx_spips_flush_txfifo(XilinxSPIPS *s) fifo8_push(&s->rx_fifo, (uint8_t)tx_rx[0]); } - DB_PRINT("initial snoop state: %x\n", (unsigned)s->snoop_state); + DB_PRINT_L(debug_level, "initial snoop state: %x\n", + (unsigned)s->snoop_state); switch (s->snoop_state) { case (SNOOP_CHECKING): switch (tx) { /* new instruction code */ @@ -347,11 +352,17 @@ static void xilinx_spips_flush_txfifo(XilinxSPIPS *s) break; case (SNOOP_STRIPING): case (SNOOP_NONE): + /* Once we hit the boring stuff - squelch debug noise */ + if (!debug_level) { + DB_PRINT_L(0, "squelching debug info ....\n"); + debug_level = 1; + } break; default: s->snoop_state--; } - DB_PRINT("final snoop state: %x\n", (unsigned)s->snoop_state); + DB_PRINT_L(debug_level, "final snoop state: %x\n", + (unsigned)s->snoop_state); } } @@ -381,7 +392,7 @@ static uint64_t xilinx_spips_read(void *opaque, hwaddr addr, case R_INTR_STATUS: ret = s->regs[addr] & IXR_ALL; s->regs[addr] = 0; - DB_PRINT("addr=" TARGET_FMT_plx " = %x\n", addr * 4, ret); + DB_PRINT_L(0, "addr=" TARGET_FMT_plx " = %x\n", addr * 4, ret); return ret; case R_INTR_MASK: mask = IXR_ALL; @@ -402,11 +413,12 @@ static uint64_t xilinx_spips_read(void *opaque, hwaddr addr, break; case R_RX_DATA: rx_data_bytes(s, &ret, s->num_txrx_bytes); - DB_PRINT("addr=" TARGET_FMT_plx " = %x\n", addr * 4, ret); + DB_PRINT_L(0, "addr=" TARGET_FMT_plx " = %x\n", addr * 4, ret); xilinx_spips_update_ixr(s); return ret; } - DB_PRINT("addr=" TARGET_FMT_plx " = %x\n", addr * 4, s->regs[addr] & mask); + DB_PRINT_L(0, "addr=" TARGET_FMT_plx " = %x\n", addr * 4, + s->regs[addr] & mask); return s->regs[addr] & mask; } @@ -435,7 +447,7 @@ static void xilinx_spips_write(void *opaque, hwaddr addr, XilinxQSPIPS *q = (XilinxQSPIPS *)object_dynamic_cast(OBJECT(s), TYPE_XILINX_QSPIPS); - DB_PRINT("addr=" TARGET_FMT_plx " = %x\n", addr, (unsigned)value); + DB_PRINT_L(0, "addr=" TARGET_FMT_plx " = %x\n", addr, (unsigned)value); addr >>= 2; switch (addr) { case R_CONFIG: @@ -514,7 +526,8 @@ lqspi_read(void *opaque, hwaddr addr, unsigned int size) if (addr >= q->lqspi_cached_addr && addr <= q->lqspi_cached_addr + LQSPI_CACHE_SIZE - 4) { ret = q->lqspi_buf[(addr - q->lqspi_cached_addr) >> 2]; - DB_PRINT("addr: %08x, data: %08x\n", (unsigned)addr, (unsigned)ret); + DB_PRINT_L(1, "addr: %08x, data: %08x\n", (unsigned)addr, + (unsigned)ret); return ret; } else { int flash_addr = (addr / num_effective_busses(s)); @@ -522,7 +535,7 @@ lqspi_read(void *opaque, hwaddr addr, unsigned int size) int cache_entry = 0; uint32_t r_config_save = s->regs[R_CONFIG]; - DB_PRINT("config reg status: %08x\n", s->regs[R_LQSPI_CFG]); + DB_PRINT_L(0, "config reg status: %08x\n", s->regs[R_LQSPI_CFG]); fifo8_reset(&s->tx_fifo); fifo8_reset(&s->rx_fifo); @@ -532,11 +545,12 @@ lqspi_read(void *opaque, hwaddr addr, unsigned int size) xilinx_spips_update_cs_lines(s); /* instruction */ - DB_PRINT("pushing read instruction: %02x\n", - (uint8_t)(s->regs[R_LQSPI_CFG] & LQSPI_CFG_INST_CODE)); + DB_PRINT_L(0, "pushing read instruction: %02x\n", + (unsigned)(uint8_t)(s->regs[R_LQSPI_CFG] & + LQSPI_CFG_INST_CODE)); fifo8_push(&s->tx_fifo, s->regs[R_LQSPI_CFG] & LQSPI_CFG_INST_CODE); /* read address */ - DB_PRINT("pushing read address %06x\n", flash_addr); + DB_PRINT_L(0, "pushing read address %06x\n", flash_addr); fifo8_push(&s->tx_fifo, (uint8_t)(flash_addr >> 16)); fifo8_push(&s->tx_fifo, (uint8_t)(flash_addr >> 8)); fifo8_push(&s->tx_fifo, (uint8_t)flash_addr); @@ -549,13 +563,13 @@ lqspi_read(void *opaque, hwaddr addr, unsigned int size) /* dummy bytes */ for (i = 0; i < (extract32(s->regs[R_LQSPI_CFG], LQSPI_CFG_DUMMY_SHIFT, LQSPI_CFG_DUMMY_WIDTH)); ++i) { - DB_PRINT("pushing dummy byte\n"); + DB_PRINT_L(0, "pushing dummy byte\n"); fifo8_push(&s->tx_fifo, 0); } xilinx_spips_flush_txfifo(s); fifo8_reset(&s->rx_fifo); - DB_PRINT("starting QSPI data read\n"); + DB_PRINT_L(0, "starting QSPI data read\n"); for (i = 0; i < LQSPI_CACHE_SIZE / 4; ++i) { tx_data_bytes(s, 0, 4); @@ -589,7 +603,7 @@ static void xilinx_spips_realize(DeviceState *dev, Error **errp) SysBusDevice *sbd = SYS_BUS_DEVICE(dev); int i; - DB_PRINT("realized spips\n"); + DB_PRINT_L(0, "realized spips\n"); s->spi = g_new(SSIBus *, s->num_busses); for (i = 0; i < s->num_busses; ++i) { @@ -621,7 +635,7 @@ static void xilinx_qspips_realize(DeviceState *dev, Error **errp) XilinxQSPIPS *q = XILINX_QSPIPS(dev); SysBusDevice *sbd = SYS_BUS_DEVICE(dev); - DB_PRINT("realized qspips\n"); + DB_PRINT_L(0, "realized qspips\n"); s->num_busses = 2; s->num_cs = 2;