From patchwork Wed Apr 3 04:33:01 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Crosthwaite X-Patchwork-Id: 233227 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 9A9DD2C0131 for ; Wed, 3 Apr 2013 15:37:03 +1100 (EST) Received: from localhost ([::1]:48330 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UNFRS-00026F-TO for incoming@patchwork.ozlabs.org; Wed, 03 Apr 2013 00:36:58 -0400 Received: from eggs.gnu.org ([208.118.235.92]:60000) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UNFR0-0001sV-RU for qemu-devel@nongnu.org; Wed, 03 Apr 2013 00:36:31 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1UNFQz-0006vd-Qm for qemu-devel@nongnu.org; Wed, 03 Apr 2013 00:36:30 -0400 Received: from mail-pb0-f45.google.com ([209.85.160.45]:62397) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UNFQz-0006vT-Es for qemu-devel@nongnu.org; Wed, 03 Apr 2013 00:36:29 -0400 Received: by mail-pb0-f45.google.com with SMTP id ro12so340396pbb.32 for ; Tue, 02 Apr 2013 21:36:28 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-received:sender:from:to:cc:subject:date:message-id:x-mailer :in-reply-to:references:in-reply-to:references:x-gm-message-state; bh=TsJkLvBnmQpVJjG4I1NMjJzFVBAzWDHO1j6k1OcGQVc=; b=DbUDVPYlEJj1yjRkPfXygGuTFkJbO8xUkblDJZ+TYUf6h1kmac1Q0I13EJhybt892M qm0C+9ijecVNgaGtyJIAsbDq0b5leI8KJM5sEQq3I4O871xSV2PoG9QQxMp76yjFtxSN xAV3jpTGHjPQNyB325LLg8pSge9V38/qshccaFcUrwKIr9LqBAstIdwahhKBFSa5471+ 68JrfJO48I/1fcnI3OF1S1jNrhJgjygPZNyAZ6cFlZA1iv5rowpWg7+ENY5phXJdpklB 1Ann1uGnatKQExCkWJFjXdWK+JAes8Ce2SX9DjMdofsDKidSrw2YGRcd8jA2pPLkdEZv iyww== X-Received: by 10.66.121.1 with SMTP id lg1mr917481pab.167.1364963788768; Tue, 02 Apr 2013 21:36:28 -0700 (PDT) Received: from localhost ([149.199.62.254]) by mx.google.com with ESMTPS id t5sm4347865pbi.10.2013.04.02.21.36.26 (version=TLSv1.1 cipher=RC4-SHA bits=128/128); Tue, 02 Apr 2013 21:36:27 -0700 (PDT) From: Peter Crosthwaite To: qemu-devel@nongnu.org, peter.maydell@linaro.org Date: Wed, 3 Apr 2013 14:33:01 +1000 Message-Id: <3a9614850955438c5eb045d19ef18f788a54d6bc.1364962908.git.peter.crosthwaite@xilinx.com> X-Mailer: git-send-email 1.7.0.4 In-Reply-To: <475b23a3c56ec5ee1a8652f33e0a12d0bb4ac7f6.1364962908.git.peter.crosthwaite@xilinx.com> References: <475b23a3c56ec5ee1a8652f33e0a12d0bb4ac7f6.1364962908.git.peter.crosthwaite@xilinx.com> In-Reply-To: References: X-Gm-Message-State: ALoCoQmzu8upDHL2hx8AvTS6o4b0CUWdAwjyUWCUQhA8rUKrQqcoTpLm6CDb6pAVXaH6bIr8k2wQ X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [fuzzy] X-Received-From: 209.85.160.45 Cc: Peter Crosthwaite Subject: [Qemu-devel] [PATCH arm-devs v1 09/15] xilinx_spips: Implement automatic CS X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Implement the automatic CS control feature. If the MANUAL_CS bit is cleared then the chip select stay de-asserted as long as the tx FIFO is empty. Signed-off-by: Peter Crosthwaite --- hw/xilinx_spips.c | 12 +++++++++--- 1 files changed, 9 insertions(+), 3 deletions(-) diff --git a/hw/xilinx_spips.c b/hw/xilinx_spips.c index f7d942e..16c2e1d 100644 --- a/hw/xilinx_spips.c +++ b/hw/xilinx_spips.c @@ -177,6 +177,12 @@ static inline int num_effective_busses(XilinxSPIPS *s) s->regs[R_LQSPI_CFG] & LQSPI_CFG_TWO_MEM) ? s->num_busses : 1; } +static inline bool xilinx_spips_cs_is_set(XilinxSPIPS *s, int i, int field) +{ + return ~field & (1 << i) && (s->regs[R_CONFIG] & MANUAL_CS + || !fifo8_is_empty(&s->tx_fifo)); +} + static void xilinx_spips_update_cs_lines(XilinxSPIPS *s) { int i, j; @@ -189,14 +195,14 @@ static void xilinx_spips_update_cs_lines(XilinxSPIPS *s) int cs_to_set = (j * s->num_cs + i + upage) % (s->num_cs * s->num_busses); - if (~field & (1 << i) && !found) { + if (xilinx_spips_cs_is_set(s, i, field) && !found) { DB_PRINT("selecting slave %d\n", i); qemu_set_irq(s->cs_lines[cs_to_set], 0); } else { qemu_set_irq(s->cs_lines[cs_to_set], 1); } } - if (~field & (1 << i)) { + if (xilinx_spips_cs_is_set(s, i, field)) { found = true; } } @@ -487,7 +493,7 @@ lqspi_read(void *opaque, hwaddr addr, unsigned int size) fifo8_reset(&s->rx_fifo); s->regs[R_CONFIG] &= ~CS; - s->regs[R_CONFIG] |= (~(1 << slave) << CS_SHIFT) & CS; + s->regs[R_CONFIG] |= ((~(1 << slave) << CS_SHIFT) & CS) | MANUAL_CS; xilinx_spips_update_cs_lines(s); /* instruction */