@@ -21,6 +21,8 @@ linux-headers/asm
qapi-generated
qapi-types.[ch]
qapi-visit.[ch]
+cpu-qapi-types.[ch]
+cpu-qapi-visit.[ch]
qmp-commands.h
qmp-marshal.c
qemu-doc.html
@@ -35,6 +35,9 @@ GENERATED_HEADERS = config-host.h qemu-options.def
GENERATED_HEADERS += qmp-commands.h qapi-types.h qapi-visit.h
GENERATED_SOURCES += qmp-marshal.c qapi-types.c qapi-visit.c
+GENERATED_HEADERS += cpu-qapi-types.h cpu-qapi-visit.h
+GENERATED_SOURCES += cpu-qapi-types.c cpu-qapi-visit.c
+
GENERATED_HEADERS += trace/generated-events.h
GENERATED_SOURCES += trace/generated-events.c
@@ -209,6 +212,14 @@ qmp-commands.h qmp-marshal.c :\
$(SRC_PATH)/qapi-schema.json $(SRC_PATH)/scripts/qapi-commands.py $(qapi-py)
$(call quiet-command,$(PYTHON) $(SRC_PATH)/scripts/qapi-commands.py $(gen-out-type) -m -o "." < $<, " GEN $@")
+cpu-qapi-types.c cpu-qapi-types.h :\
+$(SRC_PATH)/cpu-qapi-schema.json $(SRC_PATH)/scripts/qapi-types.py $(qapi-py)
+ $(call quiet-command,$(PYTHON) $(SRC_PATH)/scripts/qapi-types.py $(gen-out-type) -o "." -p "cpu-" < $<, " GEN $@")
+cpu-qapi-visit.c cpu-qapi-visit.h :\
+$(SRC_PATH)/cpu-qapi-schema.json $(SRC_PATH)/scripts/qapi-visit.py $(qapi-py)
+ $(call quiet-command,$(PYTHON) $(SRC_PATH)/scripts/qapi-visit.py $(gen-out-type) -o "." -p "cpu-" < $<, " GEN $@")
+
+
QGALIB_GEN=$(addprefix qga/qapi-generated/, qga-qapi-types.h qga-qapi-visit.h qga-qmp-commands.h)
$(qga-obj-y) qemu-ga.o: $(QGALIB_GEN)
@@ -91,6 +91,11 @@ common-obj-y += qmp-marshal.o qapi-visit.o qapi-types.o
common-obj-y += qmp.o hmp.o
endif
+######################################################################
+# qapi types used by both system and user emulation:
+
+common-obj-y += cpu-qapi-types.o cpu-qapi-visit.o
+
#######################################################################
# Target-independent parts used in system and user emulation
common-obj-y += qemu-log.o
new file mode 100644
@@ -0,0 +1,31 @@
+##
+# @X86CPURegister32
+#
+# A X86 32-bit register
+#
+# Since: 1.5
+##
+{ 'enum': 'X86CPURegister32',
+ 'data': [ 'EAX', 'EBX', 'ECX', 'EDX', 'ESP', 'EBP', 'ESI', 'EDI' ] }
+
+##
+# @X86CPUFeatureWordInfo
+#
+# Information about a X86 CPU feature word
+#
+# @cpuid-input-eax: Input EAX value for CPUID instruction for that feature word
+#
+# @cpuid-input-ecx: #optional Input ECX value for CPUID instruction for that
+# feature word
+#
+# @cpuid-register: Output register containing the feature bits
+#
+# @features: value of output register, containing the feature bits
+#
+# Since: 1.5
+##
+{ 'type': 'X86CPUFeatureWordInfo',
+ 'data': { 'cpuid-input-eax': 'int',
+ '*cpuid-input-ecx': 'int',
+ 'cpuid-register': 'X86CPURegister32',
+ 'features': 'int' } }
@@ -6,3 +6,4 @@ obj-$(CONFIG_KVM) += kvm.o hyperv.o
obj-$(CONFIG_NO_KVM) += kvm-stub.o
obj-$(CONFIG_LINUX_USER) += ioport-user.o
obj-$(CONFIG_BSD_USER) += ioport-user.o
+
new file mode 100644
@@ -0,0 +1,31 @@
+##
+# @X86CPURegister32
+#
+# A X86 32-bit register
+#
+# Since: 1.5
+##
+{ 'enum': 'X86CPURegister32',
+ 'data': [ 'EAX', 'EBX', 'ECX', 'EDX', 'ESP', 'EBP', 'ESI', 'EDI' ] }
+
+##
+# @X86CPUFeatureWordInfo
+#
+# Information about a X86 CPU feature word
+#
+# @cpuid-input-eax: Input EAX value for CPUID instruction for that feature word
+#
+# @cpuid-input-ecx: #optional Input ECX value for CPUID instruction for that
+# feature word
+#
+# @cpuid-register: Output register containing the feature bits
+#
+# @features: value of output register, containing the feature bits
+#
+# Since: 1.5
+##
+{ 'type': 'X86CPUFeatureWordInfo',
+ 'data': { 'cpuid-input-eax': 'int',
+ '*cpuid-input-ecx': 'int',
+ 'cpuid-register': 'X86CPURegister32',
+ 'features': 'int' } }
@@ -30,6 +30,8 @@
#include "qemu/config-file.h"
#include "qapi/qmp/qerror.h"
+#include "cpu-qapi-types.h"
+#include "cpu-qapi-visit.h"
#include "qapi/visitor.h"
#include "sysemu/arch_init.h"
@@ -194,16 +196,26 @@ static FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
},
};
-static const char *reg_names_32[CPU_NB_REGS32] = {
- [R_EAX] = "EAX",
- [R_ECX] = "ECX",
- [R_EDX] = "EDX",
- [R_EBX] = "EBX",
- [R_ESP] = "ESP",
- [R_EBP] = "EBP",
- [R_ESI] = "ESI",
- [R_EDI] = "EDI",
+typedef struct X86RegisterInfo32 {
+ /* Name of 32-bit register */
+ const char *name;
+ /* QAPI enum value for 32-bit register */
+ X86CPURegister32 qapi_enum;
+} X86RegisterInfo32;
+
+#define REGISTER(reg) \
+ [R_##reg] = { .name = #reg, .qapi_enum = X86_C_P_U_REGISTER32_##reg }
+X86RegisterInfo32 x86_reg_info_32[CPU_NB_REGS32] = {
+ REGISTER(EAX),
+ REGISTER(ECX),
+ REGISTER(EDX),
+ REGISTER(EBX),
+ REGISTER(ESP),
+ REGISTER(EBP),
+ REGISTER(ESI),
+ REGISTER(EDI),
};
+#undef REGISTER
const char *get_register_name_32(unsigned int reg)
@@ -211,7 +223,7 @@ const char *get_register_name_32(unsigned int reg)
if (reg > CPU_NB_REGS32) {
return NULL;
}
- return reg_names_32[reg];
+ return x86_reg_info_32[reg].name;
}
/* collects per-function cpuid data
@@ -1284,34 +1296,38 @@ static void x86_cpu_get_feature_words(Object *obj, Visitor *v, void *opaque,
CPUX86State *env = &cpu->env;
FeatureWord w;
Error *err = NULL;
- uint32_t feat_values[FEATURE_WORDS] = { };
+ X86CPUFeatureWordInfo word_infos[FEATURE_WORDS] = { };
+ X86CPUFeatureWordInfoList list_entries[FEATURE_WORDS] = { };
+ X86CPUFeatureWordInfoList *list = NULL;
/* We need to set the entries one-by-one, by now, while we don't have
* a single feature_words array on X86CPU
*/
- feat_values[FEAT_1_EDX] = env->cpuid_features;
- feat_values[FEAT_1_ECX] = env->cpuid_ext_features;
- feat_values[FEAT_8000_0001_EDX] = env->cpuid_ext2_features;
- feat_values[FEAT_8000_0001_ECX] = env->cpuid_ext3_features;
- feat_values[FEAT_C000_0001_EDX] = env->cpuid_ext4_features;
- feat_values[FEAT_KVM] = env->cpuid_kvm_features;
- feat_values[FEAT_SVM] = env->cpuid_svm_features;
- feat_values[FEAT_7_0_EBX] = env->cpuid_7_0_ebx_features;
-
- visit_start_list(v, "feature-words", &err);
+ word_infos[FEAT_1_EDX].features = env->cpuid_features;
+ word_infos[FEAT_1_ECX].features = env->cpuid_ext_features;
+ word_infos[FEAT_8000_0001_EDX].features = env->cpuid_ext2_features;
+ word_infos[FEAT_8000_0001_ECX].features = env->cpuid_ext3_features;
+ word_infos[FEAT_C000_0001_EDX].features = env->cpuid_ext4_features;
+ word_infos[FEAT_KVM].features = env->cpuid_kvm_features;
+ word_infos[FEAT_SVM].features = env->cpuid_svm_features;
+ word_infos[FEAT_7_0_EBX].features = env->cpuid_7_0_ebx_features;
+
+ /* Build the rest of the list fields */
for (w = 0; w < FEATURE_WORDS; w++) {
FeatureWordInfo *wi = &feature_word_info[w];
- visit_start_struct(v, NULL, NULL, NULL, 0, &err);
- visit_type_uint32(v, &wi->cpuid_eax, "cpuid-input-eax", &err);
- if (wi->cpuid_needs_ecx) {
- visit_type_uint32(v, &wi->cpuid_ecx, "cpuid-input-ecx", &err);
- }
- visit_type_enum(v, &wi->cpuid_reg, reg_names_32, "x86-register-32",
- "cpuid-register", &err);
- visit_type_uint32(v, &feat_values[w], "features", &err);
- visit_end_struct(v, &err);
+ X86CPUFeatureWordInfo *qwi = &word_infos[w];
+ qwi->cpuid_input_eax = wi->cpuid_eax;
+ qwi->has_cpuid_input_ecx = wi->cpuid_needs_ecx;
+ qwi->cpuid_input_ecx = wi->cpuid_ecx;
+ qwi->cpuid_register = x86_reg_info_32[wi->cpuid_reg].qapi_enum;
+
+ /* List will be in reverse order, but order shouldn't matter */
+ list_entries[w].next = list;
+ list_entries[w].value = &word_infos[w];
+ list = &list_entries[w];
}
- visit_end_list(v, &err);
+
+ visit_type_X86CPUFeatureWordInfoList(v, &list, "feature-words", &err);
error_propagate(errp, err);
}