From patchwork Sun Mar 31 22:35:00 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 232642 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id ADF602C00D9 for ; Mon, 1 Apr 2013 09:44:18 +1100 (EST) Received: from localhost ([::1]:46263 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UMQz2-0001t7-Nv for incoming@patchwork.ozlabs.org; Sun, 31 Mar 2013 18:44:16 -0400 Received: from eggs.gnu.org ([208.118.235.92]:32987) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UMQqv-0000h9-UD for qemu-devel@nongnu.org; Sun, 31 Mar 2013 18:36:02 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1UMQqo-0007q4-B7 for qemu-devel@nongnu.org; Sun, 31 Mar 2013 18:35:53 -0400 Received: from mail-pb0-f52.google.com ([209.85.160.52]:58104) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UMQqn-0007pu-Qz for qemu-devel@nongnu.org; Sun, 31 Mar 2013 18:35:46 -0400 Received: by mail-pb0-f52.google.com with SMTP id mc8so91546pbc.39 for ; Sun, 31 Mar 2013 15:35:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=x-received:sender:from:to:cc:subject:date:message-id:x-mailer :in-reply-to:references; bh=HgjpuaL9FKlcoZ9pcyBKBEJ42JUDpT202zOtoYpDDSs=; b=JclpbBsNNdmUVOL0jomltjcZQpGOG+ZbGBePRDJDk9chdmq/eoMB00SBZpqRxLnVER 8gyuJZu4VuxHCIWLlcaG6KjT50AjVybCLGkjtuTpVoZoyQrHfj6xSIBmZ6AIEtU8olRX qes52o/PiJIfFA00Ao5UpDFRA1Z1boThKIzbKp8gVc5hqMoP74zGlnlH0x6Bp+Sfr9Cj 3ezakrLb/xPDqeb1DhFXCpI2II50EFC8jS+m+4cNAt9CfCqlJ6RgOyW+bJ06ydbEx4qs h3KbZFfe1p9H6ifCqexA/PEyTjHcY+QFLPx+vJjYxFuoNj6p/qlopRRLVdr4nKIMKXTI 5nOQ== X-Received: by 10.68.201.194 with SMTP id kc2mr14941637pbc.27.1364769345160; Sun, 31 Mar 2013 15:35:45 -0700 (PDT) Received: from fremont.twiddle.net (50-194-63-110-static.hfc.comcastbusiness.net. [50.194.63.110]) by mx.google.com with ESMTPS id ve7sm12586235pab.11.2013.03.31.15.35.39 (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Sun, 31 Mar 2013 15:35:44 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Sun, 31 Mar 2013 15:35:00 -0700 Message-Id: <1364769305-3687-15-git-send-email-rth@twiddle.net> X-Mailer: git-send-email 1.8.1.4 In-Reply-To: <1364769305-3687-1-git-send-email-rth@twiddle.net> References: <1364769305-3687-1-git-send-email-rth@twiddle.net> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [fuzzy] X-Received-From: 209.85.160.52 Cc: Aurelien Jarno Subject: [Qemu-devel] [PATCH v5 14/19] tcg-arm: Cleanup most primitive load store subroutines X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Use even more primitive helper functions to avoid lots of duplicated code. Signed-off-by: Richard Henderson Reviewed-by: Aurelien Jarno --- tcg/arm/tcg-target.c | 235 ++++++++++++++++++++++++--------------------------- 1 file changed, 111 insertions(+), 124 deletions(-) diff --git a/tcg/arm/tcg-target.c b/tcg/arm/tcg-target.c index 24a2354..7b13a82 100644 --- a/tcg/arm/tcg-target.c +++ b/tcg/arm/tcg-target.c @@ -306,7 +306,7 @@ static inline int tcg_target_const_match(tcg_target_long val, #define TO_CPSR (1 << 20) -enum arm_data_opc_e { +typedef enum { ARITH_AND = 0x0 << 21, ARITH_EOR = 0x1 << 21, ARITH_SUB = 0x2 << 21, @@ -322,7 +322,26 @@ enum arm_data_opc_e { ARITH_MOV = 0xd << 21, ARITH_BIC = 0xe << 21, ARITH_MVN = 0xf << 21, -}; + + INSN_LDR_IMM = 0x04100000, + INSN_LDR_REG = 0x06100000, + INSN_STR_IMM = 0x04000000, + INSN_STR_REG = 0x06000000, + + INSN_LDRH_IMM = 0x005000b0, + INSN_LDRH_REG = 0x001000b0, + INSN_LDRSH_IMM = 0x005000f0, + INSN_LDRSH_REG = 0x001000f0, + INSN_STRH_IMM = 0x004000b0, + INSN_STRH_REG = 0x000000b0, + + INSN_LDRB_IMM = 0x04500000, + INSN_LDRB_REG = 0x06500000, + INSN_LDRSB_IMM = 0x005000d0, + INSN_LDRSB_REG = 0x001000d0, + INSN_STRB_IMM = 0x04400000, + INSN_STRB_REG = 0x06400000, +} ARMInsn; #define SHIFT_IMM_LSL(im) (((im) << 7) | 0x00) #define SHIFT_IMM_LSR(im) (((im) << 7) | 0x20) @@ -748,187 +767,155 @@ static inline void tcg_out_deposit(TCGContext *s, int cond, TCGReg rd, | (ofs << 7) | ((ofs + len - 1) << 16)); } -static inline void tcg_out_ld32_12(TCGContext *s, int cond, - int rd, int rn, tcg_target_long im) +/* Note that this routine is used for both LDR and LDRH formats, so we do + not wish to include an immediate shift at this point. */ +static void tcg_out_memop_r(TCGContext *s, int cond, ARMInsn opc, TCGReg rt, + TCGReg rn, TCGReg rm, bool u, bool p, bool w) { - if (im >= 0) - tcg_out32(s, (cond << 28) | 0x05900000 | - (rn << 16) | (rd << 12) | (im & 0xfff)); - else - tcg_out32(s, (cond << 28) | 0x05100000 | - (rn << 16) | (rd << 12) | ((-im) & 0xfff)); + tcg_out32(s, (cond << 28) | opc | (u << 23) | (p << 24) + | (w << 21) | (rn << 16) | (rt << 12) | rm); +} + +static void tcg_out_memop_8(TCGContext *s, int cond, ARMInsn opc, TCGReg rt, + TCGReg rn, int imm8, bool p, bool w) +{ + bool u = 1; + if (imm8 < 0) { + imm8 = -imm8; + u = 0; + } + tcg_out32(s, (cond << 28) | opc | (u << 23) | (p << 24) | (w << 21) | + (rn << 16) | (rt << 12) | ((imm8 & 0xf0) << 4) | (imm8 & 0xf)); +} + +static void tcg_out_memop_12(TCGContext *s, int cond, ARMInsn opc, TCGReg rt, + TCGReg rn, int imm12, bool p, bool w) +{ + bool u = 1; + if (imm12 < 0) { + imm12 = -imm12; + u = 0; + } + tcg_out32(s, (cond << 28) | opc | (u << 23) | (p << 24) | (w << 21) | + (rn << 16) | (rt << 12) | imm12); +} + +static inline void tcg_out_ld32_12(TCGContext *s, int cond, TCGReg rt, + TCGReg rn, int imm12) +{ + tcg_out_memop_12(s, cond, INSN_LDR_IMM, rt, rn, imm12, 1, 0); } /* Offset pre-increment with base writeback. */ -static inline void tcg_out_ld32_12wb(TCGContext *s, int cond, - int rd, int rn, tcg_target_long im) +static inline void tcg_out_ld32_12wb(TCGContext *s, int cond, TCGReg rt, + TCGReg rn, int imm12) { /* ldr with writeback and both register equals is UNPREDICTABLE */ assert(rd != rn); - - if (im >= 0) { - tcg_out32(s, (cond << 28) | 0x05b00000 | - (rn << 16) | (rd << 12) | (im & 0xfff)); - } else { - tcg_out32(s, (cond << 28) | 0x05300000 | - (rn << 16) | (rd << 12) | ((-im) & 0xfff)); - } + tcg_out_memop_12(s, cond, INSN_LDR_IMM, rt, rn, imm12, 1, 1); } -static inline void tcg_out_st32_12(TCGContext *s, int cond, - int rd, int rn, tcg_target_long im) +static inline void tcg_out_st32_12(TCGContext *s, int cond, TCGReg rt, + TCGReg rn, int imm12) { - if (im >= 0) - tcg_out32(s, (cond << 28) | 0x05800000 | - (rn << 16) | (rd << 12) | (im & 0xfff)); - else - tcg_out32(s, (cond << 28) | 0x05000000 | - (rn << 16) | (rd << 12) | ((-im) & 0xfff)); + tcg_out_memop_12(s, cond, INSN_STR_IMM, rt, rn, imm12, 1, 0); } -static inline void tcg_out_ld32_r(TCGContext *s, int cond, - int rd, int rn, int rm) +static inline void tcg_out_ld32_r(TCGContext *s, int cond, TCGReg rt, + TCGReg rn, TCGReg rm) { - tcg_out32(s, (cond << 28) | 0x07900000 | - (rn << 16) | (rd << 12) | rm); + tcg_out_memop_r(s, cond, INSN_LDR_REG, rt, rn, rm, 1, 1, 0); } -static inline void tcg_out_st32_r(TCGContext *s, int cond, - int rd, int rn, int rm) +static inline void tcg_out_st32_r(TCGContext *s, int cond, TCGReg rt, + TCGReg rn, TCGReg rm) { - tcg_out32(s, (cond << 28) | 0x07800000 | - (rn << 16) | (rd << 12) | rm); + tcg_out_memop_r(s, cond, INSN_STR_REG, rt, rn, rm, 1, 1, 0); } /* Register pre-increment with base writeback. */ -static inline void tcg_out_ld32_rwb(TCGContext *s, int cond, - int rd, int rn, int rm) +static inline void tcg_out_ld32_rwb(TCGContext *s, int cond, TCGReg rt, + TCGReg rn, TCGReg rm) { - tcg_out32(s, (cond << 28) | 0x07b00000 | - (rn << 16) | (rd << 12) | rm); + tcg_out_memop_r(s, cond, INSN_LDR_REG, rt, rn, rm, 1, 1, 1); } -static inline void tcg_out_st32_rwb(TCGContext *s, int cond, - int rd, int rn, int rm) +static inline void tcg_out_st32_rwb(TCGContext *s, int cond, TCGReg rt, + TCGReg rn, TCGReg rm) { - tcg_out32(s, (cond << 28) | 0x07a00000 | - (rn << 16) | (rd << 12) | rm); + tcg_out_memop_r(s, cond, INSN_STR_REG, rt, rn, rm, 1, 1, 1); } -static inline void tcg_out_ld16u_8(TCGContext *s, int cond, - int rd, int rn, tcg_target_long im) +static inline void tcg_out_ld16u_8(TCGContext *s, int cond, TCGReg rt, + TCGReg rn, int imm8) { - if (im >= 0) - tcg_out32(s, (cond << 28) | 0x01d000b0 | - (rn << 16) | (rd << 12) | - ((im & 0xf0) << 4) | (im & 0xf)); - else - tcg_out32(s, (cond << 28) | 0x015000b0 | - (rn << 16) | (rd << 12) | - (((-im) & 0xf0) << 4) | ((-im) & 0xf)); + tcg_out_memop_8(s, cond, INSN_LDRH_IMM, rt, rn, imm8, 1, 0); } -static inline void tcg_out_st16_8(TCGContext *s, int cond, - int rd, int rn, tcg_target_long im) +static inline void tcg_out_st16_8(TCGContext *s, int cond, TCGReg rt, + TCGReg rn, int imm8) { - if (im >= 0) - tcg_out32(s, (cond << 28) | 0x01c000b0 | - (rn << 16) | (rd << 12) | - ((im & 0xf0) << 4) | (im & 0xf)); - else - tcg_out32(s, (cond << 28) | 0x014000b0 | - (rn << 16) | (rd << 12) | - (((-im) & 0xf0) << 4) | ((-im) & 0xf)); + tcg_out_memop_8(s, cond, INSN_STRH_IMM, rt, rn, imm8, 1, 0); } -static inline void tcg_out_ld16u_r(TCGContext *s, int cond, - int rd, int rn, int rm) +static inline void tcg_out_ld16u_r(TCGContext *s, int cond, TCGReg rt, + TCGReg rn, TCGReg rm) { - tcg_out32(s, (cond << 28) | 0x019000b0 | - (rn << 16) | (rd << 12) | rm); + tcg_out_memop_r(s, cond, INSN_LDRH_REG, rt, rn, rm, 1, 1, 0); } -static inline void tcg_out_st16_r(TCGContext *s, int cond, - int rd, int rn, int rm) +static inline void tcg_out_st16_r(TCGContext *s, int cond, TCGReg rt, + TCGReg rn, TCGReg rm) { - tcg_out32(s, (cond << 28) | 0x018000b0 | - (rn << 16) | (rd << 12) | rm); + tcg_out_memop_r(s, cond, INSN_STRH_REG, rt, rn, rm, 1, 1, 0); } -static inline void tcg_out_ld16s_8(TCGContext *s, int cond, - int rd, int rn, tcg_target_long im) +static inline void tcg_out_ld16s_8(TCGContext *s, int cond, TCGReg rt, + TCGReg rn, int imm8) { - if (im >= 0) - tcg_out32(s, (cond << 28) | 0x01d000f0 | - (rn << 16) | (rd << 12) | - ((im & 0xf0) << 4) | (im & 0xf)); - else - tcg_out32(s, (cond << 28) | 0x015000f0 | - (rn << 16) | (rd << 12) | - (((-im) & 0xf0) << 4) | ((-im) & 0xf)); + tcg_out_memop_8(s, cond, INSN_LDRSH_IMM, rt, rn, imm8, 1, 0); } -static inline void tcg_out_ld16s_r(TCGContext *s, int cond, - int rd, int rn, int rm) +static inline void tcg_out_ld16s_r(TCGContext *s, int cond, TCGReg rt, + TCGReg rn, TCGReg rm) { - tcg_out32(s, (cond << 28) | 0x019000f0 | - (rn << 16) | (rd << 12) | rm); + tcg_out_memop_r(s, cond, INSN_LDRSH_REG, rt, rn, rm, 1, 1, 0); } -static inline void tcg_out_ld8_12(TCGContext *s, int cond, - int rd, int rn, tcg_target_long im) +static inline void tcg_out_ld8_12(TCGContext *s, int cond, TCGReg rt, + TCGReg rn, int imm12) { - if (im >= 0) - tcg_out32(s, (cond << 28) | 0x05d00000 | - (rn << 16) | (rd << 12) | (im & 0xfff)); - else - tcg_out32(s, (cond << 28) | 0x05500000 | - (rn << 16) | (rd << 12) | ((-im) & 0xfff)); + tcg_out_memop_12(s, cond, INSN_LDRB_IMM, rt, rn, imm12, 1, 0); } -static inline void tcg_out_st8_12(TCGContext *s, int cond, - int rd, int rn, tcg_target_long im) +static inline void tcg_out_st8_12(TCGContext *s, int cond, TCGReg rt, + TCGReg rn, int imm12) { - if (im >= 0) - tcg_out32(s, (cond << 28) | 0x05c00000 | - (rn << 16) | (rd << 12) | (im & 0xfff)); - else - tcg_out32(s, (cond << 28) | 0x05400000 | - (rn << 16) | (rd << 12) | ((-im) & 0xfff)); + tcg_out_memop_12(s, cond, INSN_STRB_IMM, rt, rn, imm12, 1, 0); } -static inline void tcg_out_ld8_r(TCGContext *s, int cond, - int rd, int rn, int rm) +static inline void tcg_out_ld8_r(TCGContext *s, int cond, TCGReg rt, + TCGReg rn, TCGReg rm) { - tcg_out32(s, (cond << 28) | 0x07d00000 | - (rn << 16) | (rd << 12) | rm); + tcg_out_memop_r(s, cond, INSN_LDRB_REG, rt, rn, rm, 1, 1, 0); } -static inline void tcg_out_st8_r(TCGContext *s, int cond, - int rd, int rn, int rm) +static inline void tcg_out_st8_r(TCGContext *s, int cond, TCGReg rt, + TCGReg rn, TCGReg rm) { - tcg_out32(s, (cond << 28) | 0x07c00000 | - (rn << 16) | (rd << 12) | rm); + tcg_out_memop_r(s, cond, INSN_STRB_REG, rt, rn, rm, 1, 1, 0); } -static inline void tcg_out_ld8s_8(TCGContext *s, int cond, - int rd, int rn, tcg_target_long im) +static inline void tcg_out_ld8s_8(TCGContext *s, int cond, TCGReg rt, + TCGReg rn, int imm8) { - if (im >= 0) - tcg_out32(s, (cond << 28) | 0x01d000d0 | - (rn << 16) | (rd << 12) | - ((im & 0xf0) << 4) | (im & 0xf)); - else - tcg_out32(s, (cond << 28) | 0x015000d0 | - (rn << 16) | (rd << 12) | - (((-im) & 0xf0) << 4) | ((-im) & 0xf)); + tcg_out_memop_8(s, cond, INSN_LDRSB_IMM, rt, rn, imm8, 1, 0); } -static inline void tcg_out_ld8s_r(TCGContext *s, int cond, - int rd, int rn, int rm) +static inline void tcg_out_ld8s_r(TCGContext *s, int cond, TCGReg rt, + TCGReg rn, TCGReg rm) { - tcg_out32(s, (cond << 28) | 0x019000d0 | - (rn << 16) | (rd << 12) | rm); + tcg_out_memop_r(s, cond, INSN_LDRSB_REG, rt, rn, rm, 1, 1, 0); } static inline void tcg_out_ld32u(TCGContext *s, int cond,