From patchwork Fri Mar 29 07:06:21 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kuo-Jung Su X-Patchwork-Id: 232378 X-Patchwork-Delegate: albert.aribaud@free.fr Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 2E1FA2C00BF for ; Fri, 29 Mar 2013 22:59:16 +1100 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 9AE5B4A051; Fri, 29 Mar 2013 12:58:38 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id EyKVDJK0L7p4; Fri, 29 Mar 2013 12:58:38 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 018714A052; Fri, 29 Mar 2013 12:57:51 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 21C834A023 for ; Fri, 29 Mar 2013 08:12:34 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id ERTD+vk8ntML for ; Fri, 29 Mar 2013 08:12:31 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-pd0-f174.google.com (mail-pd0-f174.google.com [209.85.192.174]) by theia.denx.de (Postfix) with ESMTPS id 4D5D24A026 for ; Fri, 29 Mar 2013 08:12:28 +0100 (CET) Received: by mail-pd0-f174.google.com with SMTP id p12so149294pdj.33 for ; Fri, 29 Mar 2013 00:12:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=x-received:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references:cc; bh=2bkvhBw9hIBCFT7xAwQyas5YBBQIE0oxZRTGq8yhtCs=; b=zDdMrM3zWNwRzaRoWVvrPfPz9X58Mp8KnZptgG19spuwKntF9xvr42Ih7KIgM5+74O tytm28SIXT3TjutxkXTAO6YezLxsqcOIcSDHzA2dhgPJDe00wZS+WEAppugpTbWQEnPG 1TmSzrjYMtI7XZKoj2FLzM9UHHbsplCVzle7sSDpBltPaRXqZyfKkwMJfchiYs4tyZNR vOjn6IN4SinEtd3Gjzb8VR1P5Htg91emndGY80j5vzEJBrrJj+vd7uuKpaKnGXRUbnrJ 0dYOUXvdo4k2TQY0TjG2hjEvzEQurpCifCNSvRTTB0zRaAqNMLQvCRCOHvuXIksy35bU 4rzA== X-Received: by 10.68.221.36 with SMTP id qb4mr2271740pbc.66.1364540802073; Fri, 29 Mar 2013 00:06:42 -0700 (PDT) Received: from localhost.localdomain ([220.132.37.35]) by mx.google.com with ESMTPS id tm1sm1834226pbc.11.2013.03.29.00.06.40 (version=TLSv1 cipher=DES-CBC3-SHA bits=168/168); Fri, 29 Mar 2013 00:06:41 -0700 (PDT) From: Kuo-Jung Su To: u-boot@lists.denx.de Date: Fri, 29 Mar 2013 15:06:21 +0800 Message-Id: <1364540788-13943-5-git-send-email-dantesu@gmail.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1364540788-13943-1-git-send-email-dantesu@gmail.com> References: <1364540788-13943-1-git-send-email-dantesu@gmail.com> X-Mailman-Approved-At: Fri, 29 Mar 2013 12:57:45 +0100 Cc: Marek Vasut , Kuo-Jung Su Subject: [U-Boot] [PATCH 04/11] usb-ehci: add Faraday USB 2.0 EHCI controller support X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de From: Kuo-Jung Su This patch add supports to both Faraday FUSBH200 and FOTG210, these controllers slightly differ from standard EHCI specification. Signed-off-by: Kuo-Jung Su --- common/usb_hub.c | 5 ++ drivers/usb/host/Makefile | 1 + drivers/usb/host/ehci-faraday.c | 157 +++++++++++++++++++++++++++++++++++++++ drivers/usb/host/ehci-hcd.c | 11 +++ drivers/usb/host/ehci.h | 5 ++ 5 files changed, 179 insertions(+) create mode 100644 drivers/usb/host/ehci-faraday.c -- 1.7.9.5 diff --git a/common/usb_hub.c b/common/usb_hub.c index b5eeb62..099696e 100644 --- a/common/usb_hub.c +++ b/common/usb_hub.c @@ -375,6 +375,11 @@ static int usb_hub_configure(struct usb_device *dev) return -1; } +#ifdef CONFIG_USB_EHCI_FARADAY + /* dante: fusbh200 requires a long long delay ... */ + mdelay(250); +#endif + if (usb_get_hub_status(dev, buffer) < 0) { USB_HUB_PRINTF("usb_hub_configure: failed to get Status %lX\n", dev->status); diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile index 9a6f982..d5577bd 100644 --- a/drivers/usb/host/Makefile +++ b/drivers/usb/host/Makefile @@ -44,6 +44,7 @@ COBJS-$(CONFIG_USB_EHCI_FSL) += ehci-mpc512x.o else COBJS-$(CONFIG_USB_EHCI_FSL) += ehci-fsl.o endif +COBJS-$(CONFIG_USB_EHCI_FARADAY) += ehci-faraday.o COBJS-$(CONFIG_USB_EHCI_EXYNOS) += ehci-exynos.o COBJS-$(CONFIG_USB_EHCI_MXC) += ehci-mxc.o COBJS-$(CONFIG_USB_EHCI_MXS) += ehci-mxs.o diff --git a/drivers/usb/host/ehci-faraday.c b/drivers/usb/host/ehci-faraday.c new file mode 100644 index 0000000..a5a6394 --- /dev/null +++ b/drivers/usb/host/ehci-faraday.c @@ -0,0 +1,157 @@ +/* + * Faraday USB 2.0 EHCI Controller + * + * (C) Copyright 2010 Faraday Technology + * Dante Su + * + * This file is released under the terms of GPL v2 and any later version. + * See the file COPYING in the root directory of the source tree for details. + */ + +#include +#include + +#include "ehci.h" + +#ifndef BIT +#define BIT(nr) (1UL << (nr)) +#endif + +/* Lower Timing for FPGA Mode */ +#define CFG_LOWER_TIMING 0 + +struct faraday_usb_hcd { + uint32_t iobase; +}; + +static struct faraday_usb_hcd faraday_usb_hcd_info[] = { +#ifdef CONFIG_USB_EHCI_BASE + { .iobase = CONFIG_USB_EHCI_BASE, }, +#endif +#ifdef CONFIG_USB_EHCI_BASE1 + { .iobase = CONFIG_USB_EHCI_BASE1, }, +#endif +}; + +#define HCD_REG32(chip, off) \ + *(volatile uint32_t *)((chip)->iobase + (off)) + +static inline int ehci_hci_fotg2xx(struct ehci_hccr *hccr) +{ + uint32_t iobase = (uint32_t)hccr; + return !REG32(iobase + 0x34) || REG32(iobase + 0x34) == 0xffffffff; +} + +/* + * Create the appropriate control structures to manage + * a new EHCI host controller. + */ +int ehci_hcd_init(int index, struct ehci_hccr **ret_hccr, + struct ehci_hcor **ret_hcor) +{ + struct faraday_usb_hcd *hcd = &faraday_usb_hcd_info[index]; + struct ehci_hccr *hccr; + struct ehci_hcor *hcor; + + hccr = (struct ehci_hccr *)hcd->iobase; + hcor = (struct ehci_hcor *)(hcd->iobase + + HC_LENGTH(ehci_readl(&hccr->cr_capbase))); + + if (ehci_hci_fotg2xx(hccr)) { + + /* A-device bus reset */ + HCD_REG32(hcd, 0x80) |= BIT(5); + HCD_REG32(hcd, 0x80) &= ~BIT(4); + mdelay(1); + HCD_REG32(hcd, 0x80) &= ~BIT(5); + HCD_REG32(hcd, 0x80) |= BIT(4); + mdelay(1); + + /* Reset interrupt */ + HCD_REG32(hcd, 0xC0) = 7; + + /* Disable OTG & device interrupts */ + HCD_REG32(hcd, 0xC4) = 3; + + /* Set interrupt polarity to active high */ + HCD_REG32(hcd, 0xC4) |= BIT(3); + + /* In FPGA mode (15MHz <= AHB <= 30MHz), enter half speed mode. */ + if (clk_get_rate("AHB") <= 30000000) { + HCD_REG32(hcd, 0x100) |= BIT(1); + printf("fotg210: AHB is too slow, enter half-speed mode.\n"); + } + +#ifdef CFG_LOWER_TIMING + HCD_REG32(hcd, 0x40) |= 0x0d; +#endif + + } else { + + /* Set interrupt polarity to active high */ + HCD_REG32(hcd, 0x40) |= BIT(3); + + /* In FPGA mode (15MHz <= AHB <= 30MHz), enter half speed mode. */ + if (clk_get_rate("AHB") <= 30000000) { + HCD_REG32(hcd, 0x40) |= BIT(2); + printf("fusbh200: AHB is too slow, enter half-speed mode.\n"); + } + +#ifdef CFG_LOWER_TIMING + HCD_REG32(hcd, 0x34) |= (3 << 2) | (1 << 0); +#endif + + /* Turn on VBUS */ + HCD_REG32(hcd, 0x40) &= ~BIT(4); + + /* Enable over-current & vbus error interrupts */ + HCD_REG32(hcd, 0x44) = 0x1F; + HCD_REG32(hcd, 0x48) |= BIT(1) | BIT(0); + + } + + *ret_hccr = hccr; + *ret_hcor = hcor; + + return 0; +} + +/* + * Destroy the appropriate control structures corresponding + * the the EHCI host controller. + */ +int ehci_hcd_stop(int index) +{ + return 0; +} + +int ehci_hcd_port_speed(struct ehci_hccr *hccr) +{ + int rc = 0; + int speed; + uint32_t iobase = (uint32_t)hccr; + + if (ehci_hci_fotg2xx(hccr)) + speed = (REG32(iobase + 0x80) >> 22) & 0x03; + else + speed = (REG32(iobase + 0x40) >> 9) & 0x03; + + switch (speed) { + case 0: /* full speed */ + break; + + case 1: /* low speed */ + rc = USB_PORT_STAT_LOW_SPEED; + break; + + case 2: /* high speed */ + rc = USB_PORT_STAT_HIGH_SPEED; + break; + + default: + printf("faraday-usb: invalid device speed\n"); + break; + } + + return rc; +} diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c index c816878..450d217 100644 --- a/drivers/usb/host/ehci-hcd.c +++ b/drivers/usb/host/ehci-hcd.c @@ -149,8 +149,10 @@ static int handshake(uint32_t *ptr, uint32_t mask, uint32_t done, int usec) static int ehci_reset(int index) { uint32_t cmd; +#ifndef CONFIG_USB_EHCI_FARADAY uint32_t tmp; uint32_t *reg_ptr; +#endif int ret = 0; cmd = ehci_readl(&ehcic[index].hcor->or_usbcmd); @@ -163,6 +165,7 @@ static int ehci_reset(int index) goto out; } +#ifndef CONFIG_USB_EHCI_FARADAY if (ehci_is_TDI()) { reg_ptr = (uint32_t *)((u8 *)ehcic[index].hcor + USBMODE); tmp = ehci_readl(reg_ptr); @@ -172,6 +175,7 @@ static int ehci_reset(int index) #endif ehci_writel(reg_ptr, tmp); } +#endif /* !CONFIG_USB_EHCI_FARADAY */ #ifdef CONFIG_USB_EHCI_TXFIFO_THRESH cmd = ehci_readl(&ehcic[index].hcor->or_txfilltuning); @@ -711,6 +715,9 @@ ehci_submit_root(struct usb_device *dev, unsigned long pipe, void *buffer, tmpbuf[1] |= USB_PORT_STAT_POWER >> 8; if (ehci_is_TDI()) { +#ifdef CONFIG_USB_EHCI_FARADAY + tmpbuf[1] |= ehci_hcd_port_speed(ctrl->hccr) >> 8; +#else switch (PORTSC_PSPD(reg)) { case PORTSC_PSPD_FS: break; @@ -722,6 +729,7 @@ ehci_submit_root(struct usb_device *dev, unsigned long pipe, void *buffer, tmpbuf[1] |= USB_PORT_STAT_HIGH_SPEED >> 8; break; } +#endif } else { tmpbuf[1] |= USB_PORT_STAT_HIGH_SPEED >> 8; } @@ -950,10 +958,13 @@ int usb_lowlevel_init(int index, void **controller) cmd |= CMD_RUN; ehci_writel(&ehcic[index].hcor->or_usbcmd, cmd); +#ifndef CONFIG_USB_EHCI_FARADAY /* take control over the ports */ cmd = ehci_readl(&ehcic[index].hcor->or_configflag); cmd |= FLAG_CF; ehci_writel(&ehcic[index].hcor->or_configflag, cmd); +#endif + /* unblock posted write */ cmd = ehci_readl(&ehcic[index].hcor->or_usbcmd); mdelay(5); diff --git a/drivers/usb/host/ehci.h b/drivers/usb/host/ehci.h index d090f0a..9309ede 100644 --- a/drivers/usb/host/ehci.h +++ b/drivers/usb/host/ehci.h @@ -82,6 +82,7 @@ struct ehci_hcor { uint32_t or_periodiclistbase; uint32_t or_asynclistaddr; uint32_t _reserved_0_; +#ifndef CONFIG_USB_EHCI_FARADAY uint32_t or_burstsize; uint32_t or_txfilltuning; #define TXFIFO_THRESH_MASK (0x3f << 16) @@ -89,6 +90,7 @@ struct ehci_hcor { uint32_t _reserved_1_[6]; uint32_t or_configflag; #define FLAG_CF (1 << 0) /* true: we'll support "high speed" */ +#endif /* #ifndef CONFIG_USB_EHCI_FARADAY */ uint32_t or_portsc[CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS]; #define PORTSC_PSPD(x) (((x) >> 26) & 0x3) #define PORTSC_PSPD_FS 0x0 @@ -255,5 +257,8 @@ struct QH { /* Low level init functions */ int ehci_hcd_init(int index, struct ehci_hccr **hccr, struct ehci_hcor **hcor); int ehci_hcd_stop(int index); +#ifdef CONFIG_USB_EHCI_FARADAY +int ehci_hcd_port_speed(struct ehci_hccr *hccr); +#endif #endif /* USB_EHCI_H */